linux-kernel - Re: [PATCH 4/4] riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC

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Message-ID:
 <BMXPR01MB24405F6AD115D27D42EDB2ADFEF22@BMXPR01MB2440.INDPRD01.PROD.OUTLOOK.COM>
Date: Mon, 10 Feb 2025 09:07:42 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Inochi Amaoto <inochiama@...il.com>,
 Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Inochi Amaoto <inochiama@...look.com>,
 Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
 <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Thomas Bonnefille <thomas.bonnefille@...tlin.com>,
 Jisheng Zhang <jszhang@...nel.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-riscv@...ts.infradead.org, Yixun Lan <dlan@...too.org>,
 Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH 4/4] riscv: dts: sophgo: add reset configuration for
 Sophgo CV1800 series SoC

I found that the titles of the patches in this patchset are some using 
cv18xx, some using cv1800b, and some using cv1800. Please unify them. 
All in“cv18xx”?

On 2025/2/9 20:29, Inochi Amaoto wrote:
> Add already known reset configuration for existed device.

Please change this description to "Add known reset configurations for 
existing devices."

Regards,

Chen

>
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
>   arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 14 ++++++++++++++
>   1 file changed, 14 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> index 9aa28ade73a4..4fadcb8e4359 100644
> --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
> @@ -170,6 +170,7 @@ i2c0: i2c@...0000 {
>   			clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C0>;
>   			clock-names = "ref", "pclk";
>   			interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_I2C0>;
>   			status = "disabled";
>   		};
>   
> @@ -181,6 +182,7 @@ i2c1: i2c@...0000 {
>   			clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C1>;
>   			clock-names = "ref", "pclk";
>   			interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_I2C1>;
>   			status = "disabled";
>   		};
>   
> @@ -192,6 +194,7 @@ i2c2: i2c@...0000 {
>   			clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C2>;
>   			clock-names = "ref", "pclk";
>   			interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_I2C2>;
>   			status = "disabled";
>   		};
>   
> @@ -203,6 +206,7 @@ i2c3: i2c@...0000 {
>   			clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C3>;
>   			clock-names = "ref", "pclk";
>   			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_I2C3>;
>   			status = "disabled";
>   		};
>   
> @@ -214,6 +218,7 @@ i2c4: i2c@...0000 {
>   			clocks = <&clk CLK_I2C>, <&clk CLK_APB_I2C4>;
>   			clock-names = "ref", "pclk";
>   			interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_I2C4>;
>   			status = "disabled";
>   		};
>   
> @@ -225,6 +230,7 @@ uart0: serial@...0000 {
>   			clock-names = "baudclk", "apb_pclk";
>   			reg-shift = <2>;
>   			reg-io-width = <4>;
> +			resets = <&rst RST_UART0>;
>   			status = "disabled";
>   		};
>   
> @@ -236,6 +242,7 @@ uart1: serial@...0000 {
>   			clock-names = "baudclk", "apb_pclk";
>   			reg-shift = <2>;
>   			reg-io-width = <4>;
> +			resets = <&rst RST_UART1>;
>   			status = "disabled";
>   		};
>   
> @@ -247,6 +254,7 @@ uart2: serial@...0000 {
>   			clock-names = "baudclk", "apb_pclk";
>   			reg-shift = <2>;
>   			reg-io-width = <4>;
> +			resets = <&rst RST_UART2>;
>   			status = "disabled";
>   		};
>   
> @@ -258,6 +266,7 @@ uart3: serial@...0000 {
>   			clock-names = "baudclk", "apb_pclk";
>   			reg-shift = <2>;
>   			reg-io-width = <4>;
> +			resets = <&rst RST_UART3>;
>   			status = "disabled";
>   		};
>   
> @@ -269,6 +278,7 @@ spi0: spi@...0000 {
>   			clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI0>;
>   			clock-names = "ssi_clk", "pclk";
>   			interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_SPI0>;
>   			status = "disabled";
>   		};
>   
> @@ -280,6 +290,7 @@ spi1: spi@...0000 {
>   			clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI1>;
>   			clock-names = "ssi_clk", "pclk";
>   			interrupts = <55 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_SPI1>;
>   			status = "disabled";
>   		};
>   
> @@ -291,6 +302,7 @@ spi2: spi@...0000 {
>   			clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI2>;
>   			clock-names = "ssi_clk", "pclk";
>   			interrupts = <56 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_SPI2>;
>   			status = "disabled";
>   		};
>   
> @@ -302,6 +314,7 @@ spi3: spi@...0000 {
>   			clocks = <&clk CLK_SPI>, <&clk CLK_APB_SPI3>;
>   			clock-names = "ssi_clk", "pclk";
>   			interrupts = <57 IRQ_TYPE_LEVEL_HIGH>;
> +			resets = <&rst RST_SPI3>;
>   			status = "disabled";
>   		};
>   
> @@ -313,6 +326,7 @@ uart4: serial@...0000 {
>   			clock-names = "baudclk", "apb_pclk";
>   			reg-shift = <2>;
>   			reg-io-width = <4>;
> +			resets = <&rst RST_UART4>;
>   			status = "disabled";
>   		};
>