Message-Id: <20250210164506.495747-1-ada@thorsis.com>
Date: Mon, 10 Feb 2025 17:44:50 +0100
From: Alexander Dahl <ada@...rsis.com>
To: Claudiu Beznea <claudiu.beznea@...on.dev>
Cc: Nicolas Ferre <nicolas.ferre@...rochip.com>,
	Ryan Wanner <ryan.wanner@...rochip.com>,
	linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v2 00/16] Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device

Hei hei,

on a custom sam9x60 based board we want to access a unique ID of the
SoC.  Microchip sam-ba has a command 'readuniqueid' which returns the
content of the OTPC Product UID x Register in that case.

(On different boards with a SAMA5D2 sam-ba and we use the Serial Number
x Register for that purpose.  In the linux kernel those are exposed
through the atmel soc driver.  Those registers are not present in the
SAM9X60 series, but only for SAMA5D2/SAMA5D4 AFAIK.)

There is a driver for the OTPC of the SAMA7G5 and after comparing
register layouts it seems that one is almost identical to the one used
by SAM9X60.  Currently that driver has no support for the UIDx
registers, but I suppose it would be the right place to implement it,
because the registers are within the OTPC register address offsets.

When developing and testing it became clear the OTPC needs explicit
enabling of certain clocks in the otpc driver.  So the patch series
starts with some rework of clock bindings and clock drivers, along with
referencing that in SoC dtsi files.

After two patches with some unrelated fixups for the otpc driver, there
are more patches dealing with sam9x60 support for the driver and the
necessary clock enablement.

The last patch adds an additional nvmem device for the UIDx registers,
fullfilling the initial goal of mine.

I tested the series only on SAM9X60, not on SAMA7G5 or the other SoCs
affected, because I only have sam9x60 hardware for testing.  If someone
could test on SAM9X7, SAMA7G5, and SAMA7D65, that would be highly
appreciated.

Last question: Should the UID be added to the device entropy pool with
add_device_randomness() as done in the SAMA5D2 sfr driver?

For detailed patch changelog see each patch, general changelog below.

Greets
Alex

(series based on v6.14-rc2)

v2:
- Removed patch adding bad OPTC conditions warnings on probe
- Removed patch adding more register definitions (the one register
  definition required was moved to the last patch adding the nvmem for
  UID registers)
- Added multiple new patches handling the dt-bindings issues
- Extend the possibility to enable the main rc oscillator to all at91
  SoCs with an OTPC
- Added patches to reference and enable the OTPC peripheral clock on all
  capable SoCs
- Reordered patches
- Reworded commit messages
- Squashed patches with dts changes for sam9x60
- Fixed bot warnings

v1:
- Link: https://lore.kernel.org/all/20240821105943.230281-1-ada@thorsis.com/T/#u

(I sent an RFC patch on this topic earlier this year, you'll find the
link below as a reference to the discussion.  The patch itself was
trivial and not meant for applying as is anyways, so I decided to not
write a full changelog from RFC to v1.)

RFC:
- Link: https://lore.kernel.org/all/20240412140802.1571935-1-ada@thorsis.com/T/#u

Cc: linux-arm-kernel@...ts.infradead.org
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-clk@...r.kernel.org

Alexander Dahl (16):
  dt-bindings: clock: at91: Split up per SoC partially
  ARM: dts: microchip: Use new PMC bindings
  clk: at91: Use new PMC bindings
  dt-bindings: clock: at91: Allow referencing main rc oscillator in DT
  clk: at91: Allow enabling main_rc_osc through DT
  clk: at91: Add peripheral id for OTPC
  dt-bindings: nvmem: microchip-otpc: Add compatible for SAM9X60
  dt-bindings: nvmem: microchip-otpc: Add required clocks
  nvmem: microchip-otpc: Avoid reading a write-only register
  nvmem: microchip-otpc: Fix swapped 'sleep' and 'timeout' parameters
  nvmem: microchip-otpc: Add SAM9X60 support
  ARM: dts: microchip: sama7g5: Add OTPC clocks
  ARM: dts: microchip: sam9x60: Add OTPC node
  ARM: dts: microchip: sam9x60_curiosity: Enable OTP Controller
  nvmem: microchip-otpc: Enable necessary clocks
  nvmem: microchip-otpc: Expose UID registers as 2nd nvmem device

 .../nvmem/microchip,sama7g5-otpc.yaml         | 32 ++++++++++-
 .../dts/microchip/at91-sam9x60_curiosity.dts  |  4 ++
 arch/arm/boot/dts/microchip/sam9x60.dtsi      | 25 ++++++---
 arch/arm/boot/dts/microchip/sam9x7.dtsi       | 11 ++--
 arch/arm/boot/dts/microchip/sama7d65.dtsi     |  5 +-
 arch/arm/boot/dts/microchip/sama7g5.dtsi      | 25 +++++----
 drivers/clk/at91/sam9x60.c                    | 16 +++---
 drivers/clk/at91/sam9x7.c                     | 24 +++++----
 drivers/clk/at91/sama7d65.c                   | 44 +++++++--------
 drivers/clk/at91/sama7g5.c                    | 30 ++++++-----
 drivers/nvmem/microchip-otpc.c                | 54 ++++++++++++++++---
 .../dt-bindings/clock/microchip,sam9x60-pmc.h | 22 ++++++++
 .../dt-bindings/clock/microchip,sam9x7-pmc.h  | 28 ++++++++++
 .../clock/microchip,sama7d65-pmc.h            | 35 ++++++++++++
 .../dt-bindings/clock/microchip,sama7g5-pmc.h | 27 ++++++++++
 15 files changed, 296 insertions(+), 86 deletions(-)
 create mode 100644 include/dt-bindings/clock/microchip,sam9x60-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sam9x7-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sama7d65-pmc.h
 create mode 100644 include/dt-bindings/clock/microchip,sama7g5-pmc.h


base-commit: a64dcfb451e254085a7daee5fe51bf22959d52d3
-- 
2.39.5

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