linux-kernel - Re: [PATCH 04/14] dt-bindings: clock: Document cpg bindings for the Renesas RZ/T2H SoC

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Message-ID: <CAMuHMdU782OZcug9DJnnm6Yz3gTJfjaz3_wbRVUDg334dkVrJA@mail.gmail.com>
Date: Mon, 10 Feb 2025 14:39:34 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Magnus Damm <magnus.damm@...il.com>, linux-renesas-soc@...r.kernel.org, 
	linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 04/14] dt-bindings: clock: Document cpg bindings for the
 Renesas RZ/T2H SoC

Hi Thierry,

On Wed, 29 Jan 2025 at 17:52, Thierry Bultel
<thierry.bultel.yh@...renesas.com> wrote:
> Document RZ/T2H (a.k.a r9a09g077) CPG (Clock Pulse Generator) binding.
> Add the header file for the resets and clocks definitions.
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>

Thanks for your patch!

> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/renesas,rzt2h-cpg.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/renesas,rzt2h-cpg.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Renesas RZ/T2H(P) Clock Pulse Generator (CPG)
> +
> +maintainers:
> +  - Thierry Bultel <thierry.bultel.yh@...renesas.com>
> +
> +description:
> +  On Renesas RZ/T2H SoCs, the CPG (Clock Pulse Generator) handles generation
> +  and control of clock signals for the IP modules, generation and control of resets,
> +  and control over booting, low power consumption and power supply domains.
> +
> +properties:
> +  compatible:
> +    const: renesas,r9a09g077-cpg
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: EXTAL clock input
> +      - description: LOCO clock input
> +
> +  clock-names:
> +    items:
> +      - const: extal
> +      - const: loco
> +
> +  '#clock-cells':
> +    description: |
> +      - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
> +        and a core clock reference, as defined in
> +        <dt-bindings/clock/renesas,r9a09g077-cpg.h>,
> +      - For module clocks, the two clock specifier cells must be "CPG_MOD" and
> +        a module number, also defined <dt-bindings/clock/r9a09g077-cpg.h>,

As there is a set of 32-bit Module Stop Control Registers (albeit
inconveniently named A, B, C, and so on (including some gaps)),
the hardware documentation does provide you with a number space like
on R-Car.  Hence I think you're better off without defining module numbers
in the DT bindings header file.

> +    const: 2
> +
> +  '#power-domain-cells':
> +    const: 0
> +
> +  '#reset-cells':
> +    description:
> +      The single reset specifier cell must be the reset number, as defined in
> +      <dt-bindings/clock/r9a09g077-cpg.h>.

Likewise for the Module Reset Control Registers and the reset numbers.

> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +  - '#clock-cells'
> +  - '#power-domain-cells'
> +  - '#reset-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    clock-controller@...20000 {

That address can't be right ;-)

> +        compatible = "renesas,r9a09g077-cpg";
> +        reg = <0x10420000 0x10000>;
> +        clocks = <&extal>, <&loco>;
> +        clock-names = "extal", "loco";
> +        #clock-cells = <2>;
> +        #power-domain-cells = <0>;
> +        #reset-cells = <1>;
> +    };

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds