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Message-ID: <d3712a1b-48da-4d94-82a9-e7f627dead3f@kernel.org>
Date: Tue, 11 Feb 2025 06:55:24 -0600
From: Dinh Nguyen <dinguyen@...nel.org>
To: niravkumar.l.rabara@...el.com, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, nirav.rabara@...era.com, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 0/2] arm64: dts: socfpga: agilex5: add NAND daughter
 board

On 2/10/25 01:46, niravkumar.l.rabara@...el.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> 
> Agilex5 SoCFPGA devkit supports a separate NAND daughter board.
> Document NAND daughter board compatible string and add board file.
> 
> Changes in v3:
>    * Document Agilex5 NAND daughter board and use that compatible
>      in the device tree.
> 
> link to v2:
>   - https://lore.kernel.org/all/20250205101318.1778757-1-niravkumar.l.rabara@intel.com/
> 
> Changes in v2:
>   * Use nand flash node name according to dt bindings to fix dt build warnings.
>   * Arrange node in sequence.
> 
> link to v1:
>   - https://lore.kernel.org/all/20250107084831.2750035-1-niravkumar.l.rabara@intel.com/
> 
> Niravkumar L Rabara (2):
>    dt-bindings: intel: document Agilex5 NAND daughter board
>    arm64: dts: socfpga: agilex5: add NAND daughter board
> 
>   .../bindings/arm/intel,socfpga.yaml           |  1 +
>   arch/arm64/boot/dts/intel/Makefile            |  1 +
>   .../dts/intel/socfpga_agilex5_socdk_nand.dts  | 89 +++++++++++++++++++
>   3 files changed, 91 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
> 

Applied!

Thanks,
Dinh

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