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Message-ID: <b9c21518-54fc-4907-8fc3-d492a3f33bdf@intel.com>
Date: Tue, 11 Feb 2025 12:53:15 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Sohil Mehta <sohil.mehta@...el.com>, x86@...nel.org,
 Dave Hansen <dave.hansen@...ux.intel.com>, Tony Luck <tony.luck@...el.com>
Cc: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Namhyung Kim <namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
 Adrian Hunter <adrian.hunter@...el.com>,
 Kan Liang <kan.liang@...ux.intel.com>, Thomas Gleixner <tglx@...utronix.de>,
 Borislav Petkov <bp@...en8.de>, "H . Peter Anvin" <hpa@...or.com>,
 "Rafael J . Wysocki" <rafael@...nel.org>, Len Brown <lenb@...nel.org>,
 Andy Lutomirski <luto@...nel.org>, Viresh Kumar <viresh.kumar@...aro.org>,
 Fenghua Yu <fenghua.yu@...el.com>, Jean Delvare <jdelvare@...e.com>,
 Guenter Roeck <linux@...ck-us.net>, Zhang Rui <rui.zhang@...el.com>,
 Andrew Cooper <andrew.cooper3@...rix.com>,
 David Laight <david.laight.linux@...il.com>,
 linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-acpi@...r.kernel.org, linux-pm@...r.kernel.org,
 linux-hwmon@...r.kernel.org
Subject: Re: [PATCH v2 05/17] x86/cpu/intel: Fix page copy performance for
 extended Families

On 2/11/25 11:43, Sohil Mehta wrote:
> +	/*
> +	 * Modern CPUs are generally expected to have a sane fast string
> +	 * implementation. However, the BIOS may disable it on certain CPUs
> +	 * via the architectural FAST_STRING bit.
> +	 */
> +	if (IS_ENABLED(CONFIG_X86_64) && (c->x86 == 6 || c->x86 > 15))
> +		set_cpu_cap(c, X86_FEATURE_REP_GOOD);

I'm not sure the BIOS comment is helpful here.

Also, at this point, let's just make the check >=6 (or the >=PPRO
equivalent).

It will only matter if *all* of these are true:
1. Someone has a 64-bit capable P4 that powers on
2. They're running a 64-bit mainline kernel
3. String copy is *actually* slower than the alternative
4. They are performance sensitive enough to notice

We don't even know the answer to #3 for sure. Let's just say what we're
doing in a comment:

	/* Assume that any 64-bit CPU has a good implementation */

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