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Message-ID: <5d0f0f209194ca5ad1e4f93ab5fefd40484855e3.camel@gmail.com>
Date: Tue, 11 Feb 2025 22:17:00 +0100
From: Alexander Sverdlin <alexander.sverdlin@...il.com>
To: Jingbao Qiu <qiujingbao.dlmu@...il.com>, alexandre.belloni@...tlin.com,
robh@...nel.org, krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
unicorn_wang@...look.com, inochiama@...look.com, paul.walmsley@...ive.com,
palmer@...belt.com, aou@...s.berkeley.edu
Cc: dlan@...too.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-rtc@...r.kernel.org, Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v9 1/2] dt-bindings: rtc: sophgo: add RTC support for
Sophgo CV1800 series SoC
Thanks for your patch Jingbao!
On Sun, 2024-04-28 at 14:08 +0800, Jingbao Qiu wrote:
> Add RTC devicetree binding for Sophgo CV1800 SoC.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@...il.com>
Verified against SG2000 TRM [1], the bindings make sense to me.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@...il.com>
[1] https://github.com/sophgo/sophgo-doc/releases/download/sg2000-trm-v1.01/sg2000_trm_en.pdf
---
> .../bindings/rtc/sophgo,cv1800-rtc.yaml | 53 +++++++++++++++++++
> 1 file changed, 53 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
>
> diff --git a/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> new file mode 100644
> index 000000000000..b36b51a69166
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rtc/sophgo,cv1800-rtc.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/rtc/sophgo,cv1800-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Real Time Clock of the Sophgo CV1800 SoC
> +
> +description:
> + Real Time Clock (RTC) is an independently powered module
> + within the chip, which includes a 32KHz oscillator and a
> + Power On Reset/POR submodule. It can be used for time display
> + and timed alarm generation. In addition, the hardware state
> + machine provides triggering and timing control for chip
> + power on, off, and reset.
> +
> +maintainers:
> + - Jingbao Qiu <qiujingbao.dlmu@...il.com>
> +
> +allOf:
> + - $ref: rtc.yaml#
> +
> +properties:
> + compatible:
> + const: sophgo,cv1800-rtc
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + rtc@...5000 {
> + compatible = "sophgo,cv1800-rtc";
> + reg = <0x5025000 0x2000>;
> + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&osc>;
> + };
--
Alexander Sverdlin.
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