linux-kernel - Re: [PATCH] drm/msm/dpu: Don't leak bits_per_component into random DSC

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Message-ID: <4eb08a1a-b862-4295-98d9-005f12015527@quicinc.com>
Date: Mon, 10 Feb 2025 16:17:25 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Marijn Suijten <marijn.suijten@...ainline.org>,
        Rob Clark
	<robdclark@...il.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
        "Sean
 Paul" <sean@...rly.run>, David Airlie <airlied@...il.com>,
        Simona Vetter
	<simona@...ll.ch>, Vinod Koul <vkoul@...nel.org>
CC: <~postmarketos/upstreaming@...ts.sr.ht>,
        AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>,
        Martin Botka <martin.botka@...ainline.org>,
        Jami Kettunen <jami.kettunen@...ainline.org>,
        <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/dpu: Don't leak bits_per_component into random
 DSC_ENC fields



On 2/10/2025 3:19 PM, Marijn Suijten wrote:
> What used to be the input_10_bits boolean - feeding into the lowest
> bit of DSC_ENC - on MSM downstream turned into an accidental OR with
> the full bits_per_component number when it was ported to the upstream
> kernel.
> 
> On typical bpc=8 setups we don't notice this because line_buf_depth is
> always an odd value (it contains bpc+1) and will also set the 4th bit
> after left-shifting by 3 (hence this |= bits_per_component is a no-op).
> 
> Now that guards are being removed to allow more bits_per_component
> values besides 8 (possible since commit 49fd30a7153b ("drm/msm/dsi: use
> DRM DSC helpers for DSC setup")), a bpc of 10 will instead clash with
> the 5th bit which is convert_rgb.  This is "fortunately" also always set
> to true by MSM's dsi_populate_dsc_params() already, but once a bpc of 12
> starts being used it'll write into simple_422 which is normally false.
> 
> To solve all these overlaps, simply replicate downstream code and only
> set this lowest bit if bits_per_component is equal to 10.  It is unclear
> why DSC requires this only for bpc=10 but not bpc=12, and also notice
> that this lowest bit wasn't set previously despite having a panel and
> patch on the list using it without any mentioned issues.
> 
> Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC")
> Signed-off-by: Marijn Suijten <marijn.suijten@...ainline.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 

Good catch !

Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>