linux-kernel - RE: [PATCH v3 17/35] x86/bugs: Restructure l1tf mitigation

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Message-ID:
 <LV3PR12MB926500B2ABAE8E1EE6D843FB94FC2@LV3PR12MB9265.namprd12.prod.outlook.com>
Date: Wed, 12 Feb 2025 16:47:34 +0000
From: "Kaplan, David" <David.Kaplan@....com>
To: Josh Poimboeuf <jpoimboe@...nel.org>
CC: Thomas Gleixner <tglx@...utronix.de>, Borislav Petkov <bp@...en8.de>,
	Peter Zijlstra <peterz@...radead.org>, Pawan Gupta
	<pawan.kumar.gupta@...ux.intel.com>, Ingo Molnar <mingo@...hat.com>, Dave
 Hansen <dave.hansen@...ux.intel.com>, "x86@...nel.org" <x86@...nel.org>, "H .
 Peter Anvin" <hpa@...or.com>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 17/35] x86/bugs: Restructure l1tf mitigation

[AMD Official Use Only - AMD Internal Distribution Only]

> -----Original Message-----
> From: Josh Poimboeuf <jpoimboe@...nel.org>
> Sent: Monday, February 10, 2025 7:21 PM
> To: Kaplan, David <David.Kaplan@....com>
> Cc: Thomas Gleixner <tglx@...utronix.de>; Borislav Petkov <bp@...en8.de>; Peter
> Zijlstra <peterz@...radead.org>; Pawan Gupta
> <pawan.kumar.gupta@...ux.intel.com>; Ingo Molnar <mingo@...hat.com>; Dave
> Hansen <dave.hansen@...ux.intel.com>; x86@...nel.org; H . Peter Anvin
> <hpa@...or.com>; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v3 17/35] x86/bugs: Restructure l1tf mitigation
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On Wed, Jan 08, 2025 at 02:24:57PM -0600, David Kaplan wrote:
> >  static void __init l1tf_select_mitigation(void)
> > +{
> > +     if (!boot_cpu_has_bug(X86_BUG_L1TF) || cpu_mitigations_off()) {
> > +             l1tf_mitigation = L1TF_MITIGATION_OFF;
> > +             return;
> > +     }
> > +
> > +     if (l1tf_mitigation == L1TF_MITIGATION_AUTO) {
> > +             if (cpu_mitigations_auto_nosmt())
> > +                     l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOSMT;
> > +             else
> > +                     l1tf_mitigation = L1TF_MITIGATION_FLUSH;
> > +     }
> > +
> > +}
>
> Extra whitespace.


Ack

>
> > +
> > +static void __init l1tf_apply_mitigation(void)
> >  {
> >       u64 half_pa;
> >
> >       if (!boot_cpu_has_bug(X86_BUG_L1TF))
> >               return;
> >
> > -     if (cpu_mitigations_off())
> > -             l1tf_mitigation = L1TF_MITIGATION_OFF;
> > -     else if (cpu_mitigations_auto_nosmt())
> > -             l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOSMT;
> > -
> >       override_cache_bits(&boot_cpu_data);
> >
> >       switch (l1tf_mitigation) {
> >       case L1TF_MITIGATION_OFF:
> > +             return;
>
> Note the PTE inverstion mitigation is already done unconditionally, the
> X86_FEATURE_L1TF_PTEINV bit is just for reporting that.  So this shouldn't return.
>

Ok, will fix

--David Kaplan