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Message-ID: <CACRpkdaWSgTO=S=L=m4bCXCU5b7aOG-DzN-TLEvPjb-QZGc72A@mail.gmail.com>
Date: Wed, 12 Feb 2025 23:05:36 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Nikolaos Pasaloukos <nikolaos.pasaloukos@...ize.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, James Cowgill <james.cowgill@...ize.com>,
Matt Redfearn <matthew.redfearn@...ize.com>, Neil Jones <neil.jones@...ize.com>,
Bartosz Golaszewski <brgl@...ev.pl>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 3/5] gpio: vsiapb: Add VeriSilicon APB support
Hi Nikolaos,
thanks for your patch!
This driver is really high quality, only nitpicks below.
With these addressed:
Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
On Wed, Feb 12, 2025 at 2:47 PM Nikolaos Pasaloukos
<nikolaos.pasaloukos@...ize.com> wrote:
> VeriSilicon APB v0.2 is a custom GPIO design provided from VeriSilicon
> Microelectronics. It has 32 input/output ports which can be
> configured as edge or level triggered interrupts. It also provides
> a de-bounce feature.
>
> Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@...ize.com>
(...)
> +config GPIO_VSIAPB
> + tristate "Verisilicon APB GPIO support"
> + depends on OF_GPIO
> + select GPIO_GENERIC
> + select GPIOLIB_IRQCHIP
> + select IRQ_DOMAIN_HIERARCHY
Are you really using the hierarchical domain?
Not in this driver, right? This is just regular chained IRQ.
> + /* configure the gpio chip */
> + gc = &chip->gc;
> + gc->owner = THIS_MODULE;
I think the core sets up owner for you so you can drop this assignment?
Yours,
Linus Walleij
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