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Message-ID: <21a3726f-63d0-4c33-84a2-9e11b99f9e9c@huawei.com>
Date: Wed, 12 Feb 2025 12:08:51 +0800
From: wangyushan <wangyushan12@...wei.com>
To: <xuwei5@...ilicon.com>, <yangyicong@...ilicon.com>,
	<Jonathan.Cameron@...wei.com>, <wangjie125@...wei.com>,
	<wanghuiqiang@...wei.com>, <christophe.jaillet@...adoo.fr>
CC: <prime.zeng@...ilicon.com>, <fanghao11@...wei.com>, <linuxarm@...wei.com>,
	<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 0/2] soc cache: Add support for HiSilicon L3 cache

Gentle ping on this patch.

On 2025/1/22 14:58, Yushan Wang wrote:
> This series adds support for HiSilicon SoC cache lockdown and cache
> maintenance operations.
>
> Cache lockdown feature prevents cache entries from being evicted from L3
> cache for better performance.  It can be enabled by calling mmap
> function to the file (`/dev/hisi_soc_cache_mgmt`).  This feature is
> implemented in the driver hisi_soc_l3c.
>
> L3 cache and L3 cache PMU share the same memory resource, which makes
> one fails to probe while another is on board.  Since both devices
> rely on distinct information exported by ACPI, their probing functions
> should be unrelated.  Workaround the resource conflict check by
> replacing devm_ioremap_resource() to devm_ioremap() instead.
>
> Changes in v2:
>    - Save unnecessary iterations when performing cache lock. (Christophe)
>    - Other minor style changes. (Christophe)
>    - Link to v1: https://lore.kernel.org/all/20250107132907.3521574-1-wangyushan12@huawei.com
>
> Jie Wang (1):
>    soc cache: Add framework driver for HiSilicon SoC cache
>
> Yushan Wang (1):
>    soc cache: L3 cache lockdown support for HiSilicon SoC
>
>   drivers/soc/hisilicon/Kconfig                 |  22 +
>   drivers/soc/hisilicon/Makefile                |   2 +
>   .../soc/hisilicon/hisi_soc_cache_framework.c  | 534 ++++++++++++++++++
>   .../soc/hisilicon/hisi_soc_cache_framework.h  |  77 +++
>   drivers/soc/hisilicon/hisi_soc_l3c.c          | 527 +++++++++++++++++
>   5 files changed, 1162 insertions(+)
>   create mode 100644 drivers/soc/hisilicon/hisi_soc_cache_framework.c
>   create mode 100644 drivers/soc/hisilicon/hisi_soc_cache_framework.h
>   create mode 100644 drivers/soc/hisilicon/hisi_soc_l3c.c
>


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