Message-ID: <91428aa7-5b96-480d-8f0d-c742ed25f327@kernel.org>
Date: Wed, 12 Feb 2025 06:40:14 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Paul-pl Chen (陳柏霖) <Paul-pl.Chen@...iatek.com>,
 "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
 <krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
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 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: Sunny Shen (沈姍姍) <Sunny.Shen@...iatek.com>,
 Sirius Wang (王皓昱) <Sirius.Wang@...iatek.com>,
 Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
 Xiandong Wang (王先冬)
 <Xiandong.Wang@...iatek.com>,
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 Project_Global_Chrome_Upstream_Group
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Subject: Re: [PATCH 03/12] dt-bindings: display: mediatek: add EXDMA yaml for
 MT8196

On 11/02/2025 09:23, Paul-pl Chen (陳柏霖) wrote:
> On Sat, 2025-01-18 at 09:37 +0100, Krzysztof Kozlowski wrote:
>>
>>>
>>> (2)Primary Task of EXDMA:
>>> The main function of EXDMA is to transfer buffers allocated by GEM
>>> to
>>> the subsequent display pipeline.
>>> EXDMA serves as a bridge between memory allocated by GEM and the
>>> display components, rather than acting as a general-purpose DMA
>>> engine.
>>> Based on the points above, we have decided to place the EXDMA
>>> driver
>>> under the DRM display subsystem rather than under the DMA
>>> subsystem.
>>
>>
>> I don't care if it uses GEM or kernel allocator or even 3rd party
>> allocator. The question is: what is this device? If it is performing
>> DMA, then it should be placed in "dma" directory. The rdma was placed
>> differently but as you can easily check: it was never acked/reviewed,
>> so
>> don't use it as an example.
>>
>> Of course if it does not perform DMA, then it should not be in dma,
>> but
>> then I don't agree on using dma-cells here and anything like that in
>> the
>> driver.
>>
>> Best regards,
>> Krzysztof
>>
>>
>>
> 
> Hi KK,
> 
> Sorry, I just found this email was not send. 
> 
> This email is discuss about the EXDMA under the display subsystem
> 
> The current placement of EXDMA under the display subsystem in
> Mediatek's architecture is primarily due to its functional role as a
> sub-device within the display pipeline.
>  
> In MT8196 hardware design, the sub-devices in display pipeline follow a
> sequence of: EXDMA -> BLENDER -> OUTPROC -> PQ -> DVO.
>  
> In MT8195 hardware design, the sub-devices in display pipeline follow a
> sequence of: OVL -> PQ ->DSI.
>  
> As we see, OVL has been divided into three new hardware IPs in MT8196.
> OVL and EXDMA both have the ability to fetch data directly from DRAM
> and can be regarded as DMA controller.
>  
> I also have confirmed with the hardware designer that EXDMA is a kind
> of DMA, but it is specially designed to handle the graphical layer, and
> has better performance than ordinary DMA.

To me the decisive factor is that you use dma-cells here, so it is a DMA
controller. DMA controllers should placed in a directory of their
maintainer, so they can review it.

>  
> Therefore, I think that moving EXDMA and OVL from the display folder to
> the DMA folder, or only kepping them in the display folder is decided
> by the two different views of DMA ability or display sub-device.
>  
> We will follow your instructions to put EXDMA on the place you decided.
> 
> 
> Best, Paul 
> 


Best regards,
Krzysztof

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