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Message-ID: <3cwfckzxe32amd24b2mv72vuo63kra52dcjqksm4hux3vm3ckr@ym2ieq7w2ssq>
Date: Fri, 14 Feb 2025 00:06:19 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Anjelique Melendez <anjelique.melendez@....qualcomm.com>
Cc: amitk@...nel.org, thara.gopinath@...il.com, rafael@...nel.org,
daniel.lezcano@...aro.org, rui.zhang@...el.com, lukasz.luba@....com,
david.collins@....qualcomm.com, linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/4] thermal: qcom-spmi-temp-alarm: add support for GEN2
rev 2 PMIC peripherals
On Thu, Feb 13, 2025 at 01:04:02PM -0800, Anjelique Melendez wrote:
> Add support for TEMP_ALARM GEN2 PMIC peripherals with digital major
> revision 2. This revision utilizes individual temp DAC registers
> to set the threshold temperature for over-temperature stages 1,
> 2, and 3 instead of a single register to specify a set of
> thresholds.
>
> Signed-off-by: David Collins <david.collins@....qualcomm.com>
> Signed-off-by: Anjelique Melendez <anjelique.melendez@....qualcomm.com>
> ---
> drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 136 ++++++++++++++++++++
> 1 file changed, 136 insertions(+)
>
> diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
> index af71d4238340..a10f368f2039 100644
> --- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
> +++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
> @@ -25,6 +25,11 @@
> #define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40
> #define QPNP_TM_REG_ALARM_CTRL 0x46
>
> +/* TEMP_DAC_STGx registers are only present for TEMP_GEN2 v2.0 */
> +#define QPNP_TM_REG_TEMP_DAC_STG1 0x47
> +#define QPNP_TM_REG_TEMP_DAC_STG2 0x48
> +#define QPNP_TM_REG_TEMP_DAC_STG3 0x49
> +
> #define QPNP_TM_TYPE 0x09
> #define QPNP_TM_SUBTYPE_GEN1 0x08
> #define QPNP_TM_SUBTYPE_GEN2 0x09
> @@ -64,6 +69,25 @@ static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = {
>
> #define TEMP_STAGE_HYSTERESIS 2000
>
> +/*
> + * For TEMP_GEN2 v2.0, TEMP_DAC_STG1/2/3 registers are used to set the threshold
> + * for each stage independently.
> + * TEMP_DAC_STG* = 0 --> 80 C
> + * Each 8 step increase in TEMP_DAC_STG* value corresponds to 5 C (5000 mC).
> + */
> +#define TEMP_DAC_MIN 80000
> +#define TEMP_DAC_SCALE_NUM 8
> +#define TEMP_DAC_SCALE_DEN 5000
> +
> +#define TEMP_DAC_TEMP_TO_REG(temp) \
> + (((temp) - TEMP_DAC_MIN) * TEMP_DAC_SCALE_NUM / TEMP_DAC_SCALE_DEN)
> +#define TEMP_DAC_REG_TO_TEMP(reg) \
> + (TEMP_DAC_MIN + (reg) * TEMP_DAC_SCALE_DEN / TEMP_DAC_SCALE_NUM)
> +
> +static const long temp_dac_max[STAGE_COUNT] = {
> + 119375, 159375, 159375
> +};
> +
> /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
> #define DEFAULT_TEMP 37000
>
> @@ -72,6 +96,7 @@ struct qpnp_tm_chip;
> struct spmi_temp_alarm_data {
> const struct thermal_zone_device_ops *ops;
> const long (*temp_map)[THRESH_COUNT][STAGE_COUNT];
> + int (*setup)(struct qpnp_tm_chip *chip);
> int (*get_temp_stage)(struct qpnp_tm_chip *chip);
> int (*configure_trip_temps)(struct qpnp_tm_chip *chip);
> };
> @@ -87,6 +112,7 @@ struct qpnp_tm_chip {
> unsigned int thresh;
> unsigned int stage;
> unsigned int base;
> + unsigned int ntrips;
> /* protects .thresh, .stage and chip registers */
> struct mutex lock;
> bool initialized;
> @@ -304,6 +330,52 @@ static const struct thermal_zone_device_ops qpnp_tm_sensor_ops = {
> .set_trip_temp = qpnp_tm_set_trip_temp,
> };
>
> +static int qpnp_tm_gen2_rev2_set_temp_thresh(struct qpnp_tm_chip *chip, int trip, int temp)
> +{
> + int ret, temp_cfg;
> + u8 reg;
> +
> + if (trip < 0 || trip >= STAGE_COUNT) {
> + dev_err(chip->dev, "invalid TEMP_DAC trip = %d\n", trip);
> + return -EINVAL;
> + } else if (temp < TEMP_DAC_MIN || temp > temp_dac_max[trip]) {
> + dev_err(chip->dev, "invalid TEMP_DAC temp = %d\n", temp);
> + return -EINVAL;
> + }
> +
> + reg = TEMP_DAC_TEMP_TO_REG(temp);
> + temp_cfg = TEMP_DAC_REG_TO_TEMP(reg);
> +
> + ret = qpnp_tm_write(chip, QPNP_TM_REG_TEMP_DAC_STG1 + trip, reg);
> + if (ret < 0) {
> + dev_err(chip->dev, "TEMP_DAC_STG write failed, ret=%d\n", ret);
> + return ret;
> + }
> +
> + chip->temp_thresh_map[trip] = temp_cfg;
> +
> + return 0;
> +}
> +
> +static int qpnp_tm_gen2_rev2_set_trip_temp(struct thermal_zone_device *tz,
> + const struct thermal_trip *trip, int temp)
> +{
> + unsigned int trip_index = THERMAL_TRIP_PRIV_TO_INT(trip->priv);
> + struct qpnp_tm_chip *chip = thermal_zone_device_priv(tz);
> + int ret;
> +
> + mutex_lock(&chip->lock);
> + ret = qpnp_tm_gen2_rev2_set_temp_thresh(chip, trip_index, temp);
> + mutex_unlock(&chip->lock);
> +
> + return ret;
> +}
> +
> +static const struct thermal_zone_device_ops qpnp_tm_gen2_rev2_sensor_ops = {
> + .get_temp = qpnp_tm_get_temp,
> + .set_trip_temp = qpnp_tm_gen2_rev2_set_trip_temp,
> +};
> +
> static irqreturn_t qpnp_tm_isr(int irq, void *data)
> {
> struct qpnp_tm_chip *chip = data;
> @@ -328,6 +400,58 @@ static int qpnp_tm_configure_trip_temp(struct qpnp_tm_chip *chip)
> return qpnp_tm_update_critical_trip_temp(chip, crit_temp);
> }
>
> +/* Configure TEMP_DAC registers based on DT thermal_zone trips */
> +static int qpnp_tm_gen2_rev2_configure_trip_temps_cb(struct thermal_trip *trip, void *data)
> +{
> + struct qpnp_tm_chip *chip = data;
> + int ret;
> +
> + trip->priv = THERMAL_INT_TO_TRIP_PRIV(chip->ntrips);
> + ret = qpnp_tm_gen2_rev2_set_temp_thresh(chip, chip->ntrips, trip->temperature);
> + chip->ntrips++;
> +
> + return ret;
> +}
> +
> +static int qpnp_tm_gen2_rev2_configure_trip_temps(struct qpnp_tm_chip *chip)
> +{
> + int ret, i;
> +
> + ret = thermal_zone_for_each_trip(chip->tz_dev,
> + qpnp_tm_gen2_rev2_configure_trip_temps_cb, chip);
> + if (ret < 0)
> + return ret;
> +
> + /* Verify that trips are strictly increasing. */
> + for (i = 1; i < STAGE_COUNT; i++) {
> + if (chip->temp_thresh_map[i] <= chip->temp_thresh_map[i - 1]) {
> + dev_err(chip->dev, "Threshold %d=%ld <= threshold %d=%ld\n",
> + i, chip->temp_thresh_map[i], i - 1,
> + chip->temp_thresh_map[i - 1]);
> + return -EINVAL;
> + }
> + }
> +
> + return 0;
> +}
> +
> +/* Read the hardware default TEMP_DAC stage threshold temperatures */
> +static int qpnp_tm_gen2_rev2_init(struct qpnp_tm_chip *chip)
qpnp_tm_gen2_rev2_setup() (or rename the field to .init)
> +{
> + int ret, i;
> + u8 reg = 0;
> +
> + for (i = 0; i < STAGE_COUNT; i++) {
> + ret = qpnp_tm_read(chip, QPNP_TM_REG_TEMP_DAC_STG1 + i, ®);
> + if (ret < 0)
> + return ret;
> +
> + chip->temp_thresh_map[i] = TEMP_DAC_REG_TO_TEMP(reg);
> + }
> +
> + return 0;
> +}
> +
> static const struct spmi_temp_alarm_data spmi_temp_alarm_data = {
> .ops = &qpnp_tm_sensor_ops,
> .temp_map = &temp_map_gen1,
> @@ -349,6 +473,13 @@ static const struct spmi_temp_alarm_data spmi_temp_alarm_gen2_rev1_data = {
> .get_temp_stage = qpnp_tm_gen2_get_temp_stage,
> };
>
> +static const struct spmi_temp_alarm_data spmi_temp_alarm_gen2_rev2_data = {
> + .ops = &qpnp_tm_gen2_rev2_sensor_ops,
> + .setup = qpnp_tm_gen2_rev2_init,
> + .configure_trip_temps = qpnp_tm_gen2_rev2_configure_trip_temps,
> + .get_temp_stage = qpnp_tm_gen2_get_temp_stage,
> +};
> +
> /*
> * This function initializes the internal temp value based on only the
> * current thermal stage and threshold. Setup threshold control and
> @@ -484,6 +615,8 @@ static int qpnp_tm_probe(struct platform_device *pdev)
>
> if (subtype == QPNP_TM_SUBTYPE_GEN1)
> chip->data = &spmi_temp_alarm_data;
> + else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 2)
> + chip->data = &spmi_temp_alarm_gen2_rev2_data;
> else if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1)
> chip->data = &spmi_temp_alarm_gen2_rev1_data;
> else if (subtype == QPNP_TM_SUBTYPE_GEN2)
> @@ -491,6 +624,9 @@ static int qpnp_tm_probe(struct platform_device *pdev)
> else
> return -ENODEV;
>
> + if (chip->data->setup)
> + chip->data->setup(chip);
> +
> /*
> * Register the sensor before initializing the hardware to be able to
> * read the trip points. get_temp() returns the default temperature
> --
> 2.34.1
>
--
With best wishes
Dmitry
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