linux-kernel - RE: [PATCH v5 0/4] Add support for RAS DES feature in PCIe DW

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <005201db7e3d$e82427b0$b86c7710$@samsung.com>
Date: Thu, 13 Feb 2025 23:07:05 +0530
From: "Shradha Todi" <shradha.t@...sung.com>
To: "'Niklas Cassel'" <cassel@...nel.org>
Cc: <linux-kernel@...r.kernel.org>, <linux-pci@...r.kernel.org>,
	<manivannan.sadhasivam@...aro.org>, <lpieralisi@...nel.org>, <kw@...ux.com>,
	<robh@...nel.org>, <bhelgaas@...gle.com>, <jingoohan1@...il.com>,
	<Jonathan.Cameron@...wei.com>, <fan.ni@...sung.com>,
	<a.manzanares@...sung.com>, <pankaj.dubey@...sung.com>,
	<quic_nitegupt@...cinc.com>, <quic_krichai@...cinc.com>,
	<gost.dev@...sung.com>
Subject: RE: [PATCH v5 0/4] Add support for RAS DES feature in PCIe DW



> -----Original Message-----
> From: Niklas Cassel <cassel@...nel.org>
> Sent: 13 February 2025 20:09
> To: Shradha Todi <shradha.t@...sung.com>
> Cc: linux-kernel@...r.kernel.org; linux-pci@...r.kernel.org; manivannan.sadhasivam@...aro.org; lpieralisi@...nel.org;
> kw@...ux.com; robh@...nel.org; bhelgaas@...gle.com; jingoohan1@...il.com; Jonathan.Cameron@...wei.com;
> fan.ni@...sung.com; a.manzanares@...sung.com; pankaj.dubey@...sung.com; quic_nitegupt@...cinc.com;
> quic_krichai@...cinc.com; gost.dev@...sung.com
> Subject: Re: [PATCH v5 0/4] Add support for RAS DES feature in PCIe DW
> 
> On Tue, Jan 21, 2025 at 04:44:17PM +0530, Shradha Todi wrote:
> > DesignWare controller provides a vendor specific extended capability
> > called RASDES as an IP feature. This extended capability  provides
> > hardware information like:
> >  - Debug registers to know the state of the link or controller.
> >  - Error injection mechanisms to inject various PCIe errors including
> >    sequence number, CRC
> >  - Statistical counters to know how many times a particular event
> >    occurred
> >
> > However, in Linux we do not have any generic or custom support to be
> > able to use this feature in an efficient manner. This is the reason we
> > are proposing this framework. Debug and bring up time of high-speed
> > IPs are highly dependent on costlier hardware analyzers and this
> > solution will in some ways help to reduce the HW analyzer usage.
> >
> > The debugfs entries can be used to get information about underlying
> > hardware and can be shared with user space. Separate debugfs entries
> > has been created to cater to all the DES hooks provided by the controller.
> > The debugfs entries interacts with the RASDES registers in the
> > required sequence and provides the meaningful data to the user. This
> > eases the effort to understand and use the register information for debugging.
> >
> > v5:
> >     - Addressed Fan's comment to split the patches for easier review
> >     - Addressed Bjorn's comment to fix vendor specific cap search
> >     - Addressed style related change requests from v4
> >     - Added rasdes debugfs init call to common designware files for host
> >       and EP.
> >
> > v4: https://lore.kernel.org/lkml/20241206074456.17401-1-shradha.t@samsung.com/
> >     - Addressed comments from Manivannan, Bjorn and Jonathan
> >     - Addressed style related change requests from v3
> >     - Added Documentation under Documentation/ABI/testing and kdoc stype
> >       comments wherever required for better understanding
> >     - Enhanced error injection to include all possible error groups
> >     - Removed debugfs init call from common designware file and left it
> >       up to individual platform drivers to init/deinit as required.
> >
> > v3: https://lore.kernel.org/all/20240625093813.112555-1-shradha.t@samsung.com/
> >     - v2 had suggestions about moving this framework to perf/EDAC instead of a
> >       controller specific debugfs but after discussions we decided to go ahead
> >       with the same. Rebased and posted v3 with minor style changes.
> >
> > v2: https://lore.kernel.org/lkml/20231130115044.53512-1-shradha.t@samsung.com/
> >     - Addressed comments from Krzysztof Wilczyński, Bjorn Helgaas and
> >       posted v2 with a changed implementation for a better code design
> >
> > v1:
> > https://lore.kernel.org/all/20210518174618.42089-1-shradha.t@samsung.c
> > om/T/
> >
> > Shradha Todi (4):
> >   PCI: dwc: Add support for vendor specific capability search
> >   Add debugfs based silicon debug support in DWC
> >   Add debugfs based error injection support in DWC
> >   Add debugfs based statistical counter support in DWC
> >
> >  Documentation/ABI/testing/debugfs-dwc-pcie    | 144 +++++
> >  drivers/pci/controller/dwc/Kconfig            |  10 +
> >  drivers/pci/controller/dwc/Makefile           |   1 +
> >  .../controller/dwc/pcie-designware-debugfs.c  | 561 ++++++++++++++++++
> >  .../pci/controller/dwc/pcie-designware-ep.c   |   5 +
> >  .../pci/controller/dwc/pcie-designware-host.c |   6 +
> >  drivers/pci/controller/dwc/pcie-designware.c  |  19 +
> > drivers/pci/controller/dwc/pcie-designware.h  |  16 +
> >  8 files changed, 762 insertions(+)
> >  create mode 100644 Documentation/ABI/testing/debugfs-dwc-pcie
> >  create mode 100644
> > drivers/pci/controller/dwc/pcie-designware-debugfs.c
> >
> > --
> > 2.17.1
> >
> 
> Shradha,
> 
> Thank you for this awesome feature!
> 
> It would be great if we could get it included in v6.15.
> 
> Are you intending to send out a v6?
> 
> 
> Kind regards,
> Niklas

Yes Niklas, I added some changes as discussed in the patch sent by Hans which separates
rasdes_init and debugfs_init and the structures so as to not make this file rasdes specific.
In the process of testing and will send it out soon.