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Message-ID: <202502131258.hhEIy45J-lkp@intel.com>
Date: Thu, 13 Feb 2025 12:16:58 +0800
From: kernel test robot <lkp@...el.com>
To: Alyssa Rosenzweig <alyssa@...enzweig.io>,
	Hector Martin <marcan@...can.st>, Sven Peter <sven@...npeter.dev>,
	Bjorn Helgaas <helgaas@...nel.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof WilczyƄski <kw@...ux.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Mark Kettenis <kettenis@...nbsd.org>, Marc Zyngier <maz@...nel.org>,
	Stan Skowronek <stan@...ellium.com>
Cc: llvm@...ts.linux.dev, oe-kbuild-all@...ts.linux.dev,
	asahi@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
	linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Alyssa Rosenzweig <alyssa@...enzweig.io>
Subject: Re: [PATCH 7/7] PCI: apple: Add T602x PCIe support

Hi Alyssa,

kernel test robot noticed the following build errors:

[auto build test ERROR on 2014c95afecee3e76ca4a56956a936e23283f05b]

url:    https://github.com/intel-lab-lkp/linux/commits/Alyssa-Rosenzweig/dt-bindings-pci-apple-pcie-Add-t6020-support/20250212-035900
base:   2014c95afecee3e76ca4a56956a936e23283f05b
patch link:    https://lore.kernel.org/r/20250211-pcie-t6-v1-7-b60e6d2501bb%40rosenzweig.io
patch subject: [PATCH 7/7] PCI: apple: Add T602x PCIe support
config: s390-randconfig-002-20250213 (https://download.01.org/0day-ci/archive/20250213/202502131258.hhEIy45J-lkp@intel.com/config)
compiler: clang version 21.0.0git (https://github.com/llvm/llvm-project 6807164500e9920638e2ab0cdb4bf8321d24f8eb)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250213/202502131258.hhEIy45J-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202502131258.hhEIy45J-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/pci/controller/pcie-apple.c:467:19: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     467 |                         writel_relaxed(FIELD_PREP(PORT_MSIMAP_TARGET, i) |
         |                                        ^
   1 error generated.


vim +/FIELD_PREP +467 drivers/pci/controller/pcie-apple.c

   429	
   430	static int apple_pcie_port_setup_irq(struct apple_pcie_port *port)
   431	{
   432		struct fwnode_handle *fwnode = &port->np->fwnode;
   433		struct apple_pcie *pcie = port->pcie;
   434		unsigned int irq;
   435	
   436		/* FIXME: consider moving each interrupt under each port */
   437		irq = irq_of_parse_and_map(to_of_node(dev_fwnode(port->pcie->dev)),
   438					   port->idx);
   439		if (!irq)
   440			return -ENXIO;
   441	
   442		port->domain = irq_domain_create_linear(fwnode, 32,
   443							&apple_port_irq_domain_ops,
   444							port);
   445		if (!port->domain)
   446			return -ENOMEM;
   447	
   448		/* Disable all interrupts */
   449		writel_relaxed(~0, port->base + PORT_INTMSK);
   450		writel_relaxed(~0, port->base + PORT_INTSTAT);
   451		writel_relaxed(~0, port->base + PORT_LINKCMDSTS);
   452	
   453		irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port);
   454	
   455		/* Configure MSI base address */
   456		BUILD_BUG_ON(upper_32_bits(DOORBELL_ADDR));
   457		writel_relaxed(lower_32_bits(DOORBELL_ADDR),
   458			       port->base + pcie->hw->port_msiaddr);
   459		if (pcie->hw->port_msiaddr_hi)
   460			writel_relaxed(0, port->base + pcie->hw->port_msiaddr_hi);
   461	
   462		/* Enable MSIs, shared between all ports */
   463		if (pcie->hw->port_msimap) {
   464			int i;
   465	
   466			for (i = 0; i < pcie->nvecs; i++) {
 > 467				writel_relaxed(FIELD_PREP(PORT_MSIMAP_TARGET, i) |
   468					       PORT_MSIMAP_ENABLE,
   469					       port->base + pcie->hw->port_msimap + 4 * i);
   470			}
   471	
   472			writel_relaxed(PORT_MSICFG_EN, port->base + PORT_MSICFG);
   473		} else {
   474			writel_relaxed(0, port->base + PORT_MSIBASE);
   475			writel_relaxed((ilog2(pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) |
   476				PORT_MSICFG_EN, port->base + PORT_MSICFG);
   477		}
   478	
   479		return 0;
   480	}
   481	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

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