[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250213-adorable-arboreal-degu-6bdcb8@krzk-bin>
Date: Thu, 13 Feb 2025 08:54:09 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Swathi K S <swathi.ks@...sung.com>
Cc: krzk+dt@...nel.org, andrew+netdev@...n.ch, davem@...emloft.net,
edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com, robh@...nel.org,
conor+dt@...nel.org, richardcochran@...il.com, mcoquelin.stm32@...il.com,
alexandre.torgue@...s.st.com, rmk+kernel@...linux.org.uk, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 1/2] dt-bindings: net: Add FSD EQoS device tree
bindings
On Thu, Feb 13, 2025 at 10:16:23AM +0530, Swathi K S wrote:
> + clock-names:
> + minItems: 5
> + maxItems: 10
> + contains:
> + enum:
> + - ptp_ref
> + - master_bus
> + - slave_bus
> + - tx
> + - rx
> + - master2_bus
> + - slave2_bus
> + - eqos_rxclk_mux
> + - eqos_phyrxclk
> + - dout_peric_rgmii_clk
This does not match the previous entry. It should be strictly ordered
with minItems: 5.
> +
> + iommus:
> + maxItems: 1
> +
> + phy-mode:
> + enum:
> + - rgmii-id
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - clock-names
> + - iommus
> + - phy-mode
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/fsd-clk.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ethernet1: ethernet@...00000 {
> + compatible = "tesla,fsd-ethqos";
> + reg = <0x0 0x14300000 0x0 0x10000>;
> + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
> + <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
> + <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
> + <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
> + <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
> + <&clock_peric PERIC_EQOS_PHYRXCLK>,
> + <&clock_peric PERIC_DOUT_RGMII_CLK>;
> + clock-names = "ptp_ref", "master_bus", "slave_bus","tx",
> + "rx", "master2_bus", "slave2_bus", "eqos_rxclk_mux",
> + "eqos_phyrxclk","dout_peric_rgmii_clk";
> + pinctrl-names = "default";
> + pinctrl-0 = <ð1_tx_clk>, <ð1_tx_data>, <ð1_tx_ctrl>,
> + <ð1_phy_intr>, <ð1_rx_clk>, <ð1_rx_data>,
> + <ð1_rx_ctrl>, <ð1_mdio>;
> + iommus = <&smmu_peric 0x0 0x1>;
> + phy-mode = "rgmii-id";
> + };
Misaligned/misindented.
Best regards,
Krzysztof
Powered by blists - more mailing lists