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Message-ID: <Z62orWpDF5obQZLy@smile.fi.intel.com>
Date: Thu, 13 Feb 2025 10:09:17 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Jiri Slaby <jirislaby@...nel.org>
Cc: Kartik Rajput <kkartik@...dia.com>, gregkh@...uxfoundation.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
thierry.reding@...il.com, jonathanh@...dia.com,
hvilleneuve@...onoff.com, arnd@...nel.org, geert+renesas@...der.be,
robert.marko@...tura.hr, schnelle@...ux.ibm.com,
linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org,
devicetree@...r.kernel.org, linux-tegra@...r.kernel.org
Subject: Re: [PATCH v3 2/2] serial: tegra-utc: Add driver for Tegra UART
Trace Controller (UTC)
On Thu, Feb 13, 2025 at 08:38:15AM +0100, Jiri Slaby wrote:
> On 12. 02. 25, 16:09, Andy Shevchenko wrote:
...
> > > + pending = uart_port_tx(port, c,
> > > + !(tegra_utc_tx_readl(tup, TEGRA_UTC_FIFO_STATUS) & TEGRA_UTC_FIFO_FULL),
> > > + tegra_utc_tx_writel(tup, c, TEGRA_UTC_DATA));
> >
> > Make the last two to reside in temporary variables with self-explanatory names.
>
> Not sure what you mean here? They are needed to be evaluated (read/written)
> in every loop.
Ah, uart_port_tx() is a macro!
--
With Best Regards,
Andy Shevchenko
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