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Message-ID: <2db7e9ef-7566-4e86-8d5c-a3b6991e070e@ghiti.fr>
Date: Thu, 13 Feb 2025 14:02:05 +0100
From: Alexandre Ghiti <alex@...ti.fr>
To: Andrew Jones <ajones@...tanamicro.com>, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Cc: paul.walmsley@...ive.com, palmer@...belt.com, charlie@...osinc.com,
jesse@...osinc.com, Anup Patel <apatel@...tanamicro.com>
Subject: Re: [PATCH 2/9] riscv: Fix riscv_online_cpu_vec
On 07/02/2025 17:19, Andrew Jones wrote:
> We shouldn't probe when we already know vector is unsupported and
> we should probe when we see we don't yet know whether it's supported.
> Furthermore, we should ensure we've set the access type to
> unsupported when we don't have vector at all.
>
> Fixes: e7c9d66e313b ("RISC-V: Report vector unaligned access speed hwprobe")
> Signed-off-by: Andrew Jones <ajones@...tanamicro.com>
> ---
> arch/riscv/kernel/unaligned_access_speed.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/unaligned_access_speed.c b/arch/riscv/kernel/unaligned_access_speed.c
> index b7a8ff7ba6df..161964cf2abc 100644
> --- a/arch/riscv/kernel/unaligned_access_speed.c
> +++ b/arch/riscv/kernel/unaligned_access_speed.c
> @@ -367,10 +367,12 @@ static void check_vector_unaligned_access(struct work_struct *work __always_unus
>
> static int riscv_online_cpu_vec(unsigned int cpu)
> {
> - if (!has_vector())
> + if (!has_vector()) {
> + per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED;
> return 0;
> + }
>
> - if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED)
> + if (per_cpu(vector_misaligned_access, cpu) != RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN)
> return 0;
>
> check_vector_unaligned_access_emulated(NULL);
Reviewed-by: Alexandre Ghiti <alexghiti@...osinc.com>
Thanks,
Alex
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