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Message-ID: <20250214163724.000003d5@huawei.com>
Date: Fri, 14 Feb 2025 16:37:24 +0000
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Robert Richter <rrichter@....com>
CC: Alison Schofield <alison.schofield@...el.com>, Vishal Verma
<vishal.l.verma@...el.com>, Ira Weiny <ira.weiny@...el.com>, Dan Williams
<dan.j.williams@...el.com>, Dave Jiang <dave.jiang@...el.com>, "Davidlohr
Bueso" <dave@...olabs.net>, <linux-cxl@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, Gregory Price <gourry@...rry.net>, "Fabio M.
De Francesco" <fabio.m.de.francesco@...ux.intel.com>, Terry Bowman
<terry.bowman@....com>
Subject: Re: [PATCH v3 17/18] cxl: Add a dev_dbg() when a decoder was added
to a port
On Tue, 11 Feb 2025 10:53:47 +0100
Robert Richter <rrichter@....com> wrote:
> Improve debugging by adding and unifying messages whenever a decoder
> was added to a port. It is especially useful to get the decoder
> mapping of the involved CXL host bridge or PCI device. This avoids a
> complex lookup of the decoder/port/device mappings in sysfs.
>
> Example log messages:
>
> cxl_acpi ACPI0017:00: decoder0.0 added to root0
> cxl_acpi ACPI0017:00: decoder0.1 added to root0
> ...
> pci0000:e0: decoder1.0 added to port1
> pci0000:e0: decoder1.1 added to port1
> ...
> cxl_mem mem0: decoder5.0 added to endpoint5
> cxl_mem mem0: decoder5.1 added to endpoint5
>
> Signed-off-by: Robert Richter <rrichter@....com>
> Reviewed-by: Gregory Price <gourry@...rry.net>
> Tested-by: Gregory Price <gourry@...rry.net>
Seems reasonable to me.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>
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