linux-kernel - Re: [PATCH v5 5/8] scsi: ufs: core: Enable multi-level gear scaling

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Message-ID: <4985f7a8acf18d0edd5fc68adc90b83f10c2904f.camel@mediatek.com>
Date: Fri, 14 Feb 2025 05:55:23 +0000
From: Peter Wang (王信友) <peter.wang@...iatek.com>
To: "beanhuo@...ron.com" <beanhuo@...ron.com>, "avri.altman@....com"
	<avri.altman@....com>, "quic_rampraka@...cinc.com"
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CC: "ahalaney@...hat.com" <ahalaney@...hat.com>, "neil.armstrong@...aro.org"
	<neil.armstrong@...aro.org>, "linux-scsi@...r.kernel.org"
	<linux-scsi@...r.kernel.org>, "manivannan.sadhasivam@...aro.org"
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Subject: Re: [PATCH v5 5/8] scsi: ufs: core: Enable multi-level gear scaling

On Thu, 2025-02-13 at 16:00 +0800, Ziqi Chen wrote:
> 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> 
> 
> From: Can Guo <quic_cang@...cinc.com>
> 
> With OPP V2 enabled, devfreq can scale clocks amongst multiple
> frequency
> plans. However, the gear speed is only toggled between min and max
> during
> clock scaling. Enable multi-level gear scaling by mapping clock
> frequencies
> to gear speeds, so that when devfreq scales clock frequencies we can
> put
> the UFS link at the appropriate gear speeds accordingly.
> 
> Signed-off-by: Can Guo <quic_cang@...cinc.com>
> Co-developed-by: Ziqi Chen <quic_ziqichen@...cinc.com>
> Signed-off-by: Ziqi Chen <quic_ziqichen@...cinc.com>
> Reviewed-by: Bean Huo <beanhuo@...ron.com>
> Reviewed-by: Bart Van Assche <bvanassche@....org>
> Tested-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
> 
> v1 -> v2:
> Rename the lable "do_pmc" to "config_pwr_mode".
> 
> v2 -> v3:
> Use assignment instead memcpy() in function ufshcd_scale_gear().
> 
> v3 -> v4:
> Typo fixed for commit message.
> 
> v4 -> v5:
> Change the data type of "new_gear" from 'int' to 'u32'.
> ---
> 

Reviewed-by: Peter Wang <peter.wang@...iatek.com>