linux-kernel - Re: [PATCH 4/8] media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoC

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Message-ID: <20250214004500.GC8393@pendragon.ideasonboard.com>
Date: Fri, 14 Feb 2025 02:45:00 +0200
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Tommaso Merciai <tomm.merciai@...il.com>
Cc: linux-renesas-soc@...r.kernel.org, linux-media@...r.kernel.org,
	biju.das.jz@...renesas.com, prabhakar.mahadev-lad.rj@...renesas.com,
	Tommaso Merciai <tommaso.merciai.xr@...renesas.com>,
	Mauro Carvalho Chehab <mchehab@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Magnus Damm <magnus.damm@...il.com>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/8] media: dt-bindings: renesas,rzg2l-cru: Document
 Renesas RZ/G3E SoC

Hi Tommaso,

Thank you for the patch.

On Mon, Feb 10, 2025 at 12:45:36PM +0100, Tommaso Merciai wrote:
> The CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC has five
> interrups:
> 
>  - image_conv:    image_conv irq
>  - axi_mst_err:   AXI master error level irq
>  - vd_addr_wend:  Video data AXI master addr 0 write end irq
>  - sd_addr_wend:  Statistics data AXI master addr 0 write end irq
>  - vsd_addr_wend: Video statistics data AXI master addr 0 write end irq
> 
> This IP has only one input port 'port@1' similar to the RZ/G2UL CRU.
> 
> Document the CRU block found on the Renesas RZ/G3E ("R9A09G047") SoC.
> 
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> ---
>  .../bindings/media/renesas,rzg2l-cru.yaml     | 33 ++++++++++++-------
>  1 file changed, 22 insertions(+), 11 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> index bc1245127025..7e4a7ed56378 100644
> --- a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> +++ b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml
> @@ -17,24 +17,34 @@ description:
>  
>  properties:
>    compatible:
> -    items:
> -      - enum:
> -          - renesas,r9a07g043-cru       # RZ/G2UL
> -          - renesas,r9a07g044-cru       # RZ/G2{L,LC}
> -          - renesas,r9a07g054-cru       # RZ/V2L
> -      - const: renesas,rzg2l-cru
> +    oneOf:
> +      - items:
> +          - enum:
> +              - renesas,r9a07g043-cru       # RZ/G2UL
> +              - renesas,r9a07g044-cru       # RZ/G2{L,LC}
> +              - renesas,r9a07g054-cru       # RZ/V2L
> +          - const: renesas,rzg2l-cru
> +
> +      - const: renesas,r9a09g047-cru        # RZ/G3E
>  
>    reg:
>      maxItems: 1
>  
>    interrupts:
> -    maxItems: 3
> +    maxItems: 5
>  
>    interrupt-names:
> -    items:
> -      - const: image_conv
> -      - const: image_conv_err
> -      - const: axi_mst_err
> +    oneOf:
> +      - items:
> +          - const: image_conv
> +          - const: image_conv_err
> +          - const: axi_mst_err
> +      - items:
> +          - const: image_conv
> +          - const: axi_mst_err
> +          - const: vd_addr_wend
> +          - const: sd_addr_wend
> +          - const: vsd_addr_wend

This should move to a conditional block.

>  
>    clocks:
>      items:
> @@ -120,6 +130,7 @@ allOf:
>            contains:
>              enum:
>                - renesas,r9a07g043-cru
> +              - renesas,r9a09g047-cru
>      then:
>        properties:
>          ports:

-- 
Regards,

Laurent Pinchart