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Message-ID:
<MA0PR01MB5671D5D25616BABA0E7F60F4FEF92@MA0PR01MB5671.INDPRD01.PROD.OUTLOOK.COM>
Date: Sat, 15 Feb 2025 11:36:18 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Inochi Amaoto <inochiama@...il.com>
Cc: Chen Wang <unicornxw@...il.com>, u.kleine-koenig@...libre.com,
aou@...s.berkeley.edu, arnd@...db.de, conor+dt@...nel.org,
guoren@...nel.org, inochiama@...look.com, krzk+dt@...nel.org,
palmer@...belt.com, paul.walmsley@...ive.com, robh@...nel.org,
tglx@...utronix.de, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
chao.wei@...hgo.com, xiaoguang.xing@...hgo.com, fengchun.li@...hgo.com,
samuel.holland@...ive.com, christophe.jaillet@...adoo.fr
Subject: Re: [PATCH v3 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt
controller
On 2025/2/15 9:09, Inochi Amaoto wrote:
> On Wed, Jan 15, 2025 at 02:33:45PM +0800, Chen Wang wrote:
[......]
>> + middle_domain = irq_domain_create_hierarchy(plic_domain, 0, data->num_irqs,
>> + fwnode,
>> + &sg2042_msi_middle_domain_ops,
>> + data);
> Use irq_domain_create_hierarchy
What's the difference?
[......]
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