linux-kernel - Re: [PATCH v1 3/4] arm64: dts: rockchip: rk356x: Add MSI controller node

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Message-ID: <68b4a5bb-79df-425a-af66-fa8973866729@collabora.com>
Date: Sun, 16 Feb 2025 18:26:15 +0300
From: Dmitry Osipenko <dmitry.osipenko@...labora.com>
To: Marc Zyngier <maz@...nel.org>
Cc: Heiko Stuebner <heiko@...ech.de>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Thomas Gleixner <tglx@...utronix.de>, devicetree@...r.kernel.org,
 linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
 Kever Yang <kever.yang@...k-chips.com>,
 XiaoDong Huang <derrick.huang@...k-chips.com>,
 Peter Geis <pgwipeout@...il.com>, Robin Murphy <robin.murphy@....com>,
 kernel@...labora.com
Subject: Re: [PATCH v1 3/4] arm64: dts: rockchip: rk356x: Add MSI controller
 node

On 2/16/25 12:59, Marc Zyngier wrote:
> On Sat, 15 Feb 2025 23:54:30 +0000,
> Dmitry Osipenko <dmitry.osipenko@...labora.com> wrote:
>>
>> Rockchip 356x SoC's GIC has two hardware integration issues that
>> affect MSI functionality of the GIC. Previously, both these GIC
>> limitations were worked around by using MBI for MSI instead of ITS
>> because kernel GIC driver didn't have necessary quirks.
>>
>> The first limitation is about RK356x GIC not supporting programmable
>> shareability. Rockchip assigned Errata ID #3568001 for this issue.
>>
>> Second limitation is about GIC AXI master interface addressing only
>> first 4GB of DRAM. Rockchip assigned Errata ID #3568002 for this issue.
>>
>> Now that kernel supports quirks for both of the erratums, add
>> MSI controller node to RK356x device-tree.
>>
>> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@...labora.com>
>> ---
>>  arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 11 +++++++++++
>>  1 file changed, 11 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
>> index 28be38b7182e..423185686600 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi
>> @@ -284,7 +284,18 @@ gic: interrupt-controller@...00000 {
>>  		mbi-alias = <0x0 0xfd410000>;
>>  		mbi-ranges = <296 24>;
>>  		msi-controller;
>> +		ranges;
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>>  		dma-noncoherent;
>> +
>> +		its: msi-controller@...40000 {
>> +			compatible = "arm,gic-v3-its";
>> +			reg = <0x0 0xfd440000 0 0x20000>;
>> +			dma-noncoherent;
>> +			msi-controller;
>> +			#msi-cells = <1>;
>> +		};
>>  	};
>>  
>>  	usb_host0_ehci: usb@...00000 {
> 
> You can merge this patch with the previous one. Marking the GIC
> non-coherent is pointless if no ITS is available, because there is no
> point in allocating memory for them.

Ack

-- 
Best regards,
Dmitry