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Message-ID: <20250216173805.3b629a61@jic23-huawei>
Date: Sun, 16 Feb 2025 17:38:05 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Lothar Rubusch <l.rubusch@...il.com>
Cc: lars@...afoo.de, Michael.Hennerich@...log.com,
linux-iio@...r.kernel.org, linux-kernel@...r.kernel.org,
eraretuya@...il.com
Subject: Re: [PATCH v2 09/14] iio: accel: adxl345: extend sample frequency
adjustments
On Mon, 10 Feb 2025 11:01:14 +0000
Lothar Rubusch <l.rubusch@...il.com> wrote:
> Introduce enums and functions to work with the sample frequency
> adjustments. Let the sample frequency adjust via IIO and configure
> a reasonable default.
>
> Replace the old static sample frequency handling. The patch is in
> preparation for activity/inactivity handling.
>
> Signed-off-by: Lothar Rubusch <l.rubusch@...il.com>
I noticed now that we don't actually have regmap caching enabled.
I think it will make things sufficiently simpler that it is worth
doing even though you have to specify which registers are volatile etc.
> +
> +static int adxl345_set_odr(struct adxl345_state *st, enum adxl345_odr odr)
> +{
> + int ret;
> +
> + ret = regmap_update_bits(st->regmap, ADXL345_REG_BW_RATE,
> + ADXL345_BW_RATE_MSK,
> + FIELD_PREP(ADXL345_BW_RATE_MSK, odr));
> + if (ret)
> + return ret;
> +
> + st->odr = odr;
Why do we need to keep a copy cached? Seems like we can get it from
regmap cache easily enough?
> +
> + return 0;
> +}
> @@ -488,7 +572,12 @@ static int adxl345_write_raw(struct iio_dev *indio_dev,
> int val, int val2, long mask)
> {
> struct adxl345_state *st = iio_priv(indio_dev);
> - s64 n;
> + enum adxl345_odr odr;
> + int ret;
> +
> + ret = adxl345_set_measure_en(st, false);
Please add some more on why this is now necessary to the patch description.
> + if (ret)
> + return ret;
>
> switch (mask) {
> case IIO_CHAN_INFO_CALIBBIAS:
> @@ -496,20 +585,24 @@ static int adxl345_write_raw(struct iio_dev *indio_dev,
> * 8-bit resolution at +/- 2g, that is 4x accel data scale
> * factor
> */
> - return regmap_write(st->regmap,
> - ADXL345_REG_OFS_AXIS(chan->address),
> - val / 4);
> + ret = regmap_write(st->regmap,
> + ADXL345_REG_OFS_AXIS(chan->address),
> + val / 4);
> + break;
> case IIO_CHAN_INFO_SAMP_FREQ:
> - n = div_s64(val * NANOHZ_PER_HZ + val2,
> - ADXL345_BASE_RATE_NANO_HZ);
> -
> - return regmap_update_bits(st->regmap, ADXL345_REG_BW_RATE,
> - ADXL345_BW_RATE,
> - clamp_val(ilog2(n), 0,
> - ADXL345_BW_RATE));
> + ret = adxl345_find_odr(st, val, val2, &odr);
> + if (ret)
> + return ret;
> + ret = adxl345_set_odr(st, odr);
> + break;
> + default:
> + return -EINVAL;
> }
>
> - return -EINVAL;
> + if (ret)
> + return ret;
> +
> + return adxl345_set_measure_en(st, true);
> }
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