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Message-ID: <dcd28035-6ba8-5d67-daa3-26812c4fc99d@linux.intel.com>
Date: Mon, 17 Feb 2025 07:47:48 -0800 (PST)
From: matthew.gerlach@...ux.intel.com
To: Krzysztof Kozlowski <krzk@...nel.org>
cc: lpieralisi@...nel.org, kw@...ux.com, manivannan.sadhasivam@...aro.org, 
    robh@...nel.org, bhelgaas@...gle.com, krzk+dt@...nel.org, 
    conor+dt@...nel.org, dinguyen@...nel.org, joyce.ooi@...el.com, 
    linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
    linux-kernel@...r.kernel.org, matthew.gerlach@...era.com, 
    peter.colberg@...era.com
Subject: Re: [PATCH v7 2/7] dt-bindings: intel: document Agilex PCIe Root
 Port



On Sun, 16 Feb 2025, Krzysztof Kozlowski wrote:

> On Sat, Feb 15, 2025 at 09:53:54AM -0600, Matthew Gerlach wrote:
>> The Agilex7f devkit can support PCIe End Points with the appropriate
>> daughter card.
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>> ---
>> v7:
>>  - New patch to series.
>> ---
>>  Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
>> index 2ee0c740eb56..0da5810c9510 100644
>> --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
>> +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml
>> @@ -20,6 +20,7 @@ properties:
>>                - intel,n5x-socdk
>>                - intel,socfpga-agilex-n6000
>>                - intel,socfpga-agilex-socdk
>> +              - intel,socfpga-agilex7f-socdk-pcie-root-port
>
> Compatible should represent the board, so what is here exactly the
> board? 7f? Agilex7f? socdk? Or is it standard agilex-socdk but with some
> things attached?

The board is the Agilex 7 FPGA F-Series Transceiver-Soc Development Kit:
https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agf014.html

There is not a single, standard agilex-socdk board. There are currently 
three variants. In addition to the F-Series socdk, there are I-Series and 
M-Series devkits:
https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/si-agi027.html
https://www.intel.com/content/www/us/en/products/details/fpga/development-kits/agilex/agm039.html

>
> But then, are they attached or you just creat the same board with
> different configuration?
The PCIe Root Port does involve a different FPGA configuration, but 
depending on the board, daughter cards and possibly cables are also 
involved.

>
> Best regards,
> Krzysztof
>
>
Thanks for the feedback,
Matthew Gerlach

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