[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b3a6afa2e818d31dc60632615215a88449fb78bf.camel@mediatek.com>
Date: Mon, 17 Feb 2025 06:06:32 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>, "AngeloGioacchino Del
Regno" <angelogioacchino.delregno@...labora.com>,
Sunny Shen (沈姍姍) <Sunny.Shen@...iatek.com>
CC: Singo Chang (張興國) <Singo.Chang@...iatek.com>,
"treapking@...omium.org" <treapking@...omium.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Paul-pl Chen (陳柏霖) <Paul-pl.Chen@...iatek.com>,
"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
"matthias.bgg@...il.com" <matthias.bgg@...il.com>, "p.zabel@...gutronix.de"
<p.zabel@...gutronix.de>
Subject: Re: [PATCH 5/5] drm/mediatek: Change main display path to support PQ
for MT8196
On Tue, 2025-02-11 at 10:52 +0800, Sunny Shen wrote:
> Due to the path mux design of the MT8196, the following components
> need to be added to support Picture Quality (PQ) in the main display
> path: CCORR0, CCORR1, DITHER0, GAMMA0, MDP_RSZ0, POSTMASK0, TDSHP0.
Reviewed-by: CK Hu <ck.hu@...iatek.com>
>
> Signed-off-by: Sunny Shen <sunny.shen@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index b810a197f58b..1c97dc46ae70 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -242,6 +242,13 @@ static const unsigned int mt8196_mtk_ddp_ovl0_main[] = {
>
> static const unsigned int mt8196_mtk_ddp_disp0_main[] = {
> DDP_COMPONENT_DLI_ASYNC0,
> + DDP_COMPONENT_MDP_RSZ0,
> + DDP_COMPONENT_TDSHP0,
> + DDP_COMPONENT_CCORR0,
> + DDP_COMPONENT_CCORR1,
> + DDP_COMPONENT_GAMMA0,
> + DDP_COMPONENT_POSTMASK0,
> + DDP_COMPONENT_DITHER0,
> DDP_COMPONENT_DLO_ASYNC1,
> };
>
Powered by blists - more mailing lists