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Message-ID: <pxej4mmrhvfpvbj2mxy6zoa65tfqpxrkul5amebwjtuuebrixf@mzpcxq7zc47h>
Date: Mon, 17 Feb 2025 08:58:19 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Chen Wang <unicorn_wang@...look.com>, Inochi Amaoto <inochiama@...look.com>,
Richard Cochran <richardcochran@...il.com>
Cc: Inochi Amaoto <inochiama@...il.com>, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
Yixun Lan <dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v2 0/2] clk: sophgo: add SG2044 clock controller support
On Tue, Feb 04, 2025 at 04:44:33PM +0800, Inochi Amaoto wrote:
> The clock controller of SG2044 provides multiple clocks for various
> IPs on the SoC, including PLL, mux, div and gates. As the PLL and
> div have obvious changed and do not fit the framework of SG2042,
> a new implement is provided to handle these.
>
> Changed from v1:
> patch 1:
> 1. Applied Krzysztof's tag
>
> patch 2:
> 1. Fix the build warning from bot.
>
> Inochi Amaoto (2):
> dt-bindings: clock: sophgo: add clock controller for SG2044
> clk: sophgo: Add clock controller support for SG2044 SoC
>
> .../bindings/clock/sophgo,sg2044-clk.yaml | 40 +
> drivers/clk/sophgo/Kconfig | 11 +
> drivers/clk/sophgo/Makefile | 1 +
> drivers/clk/sophgo/clk-sg2044.c | 2271 +++++++++++++++++
> drivers/clk/sophgo/clk-sg2044.h | 62 +
> include/dt-bindings/clock/sophgo,sg2044-clk.h | 170 ++
> 6 files changed, 2555 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2044-clk.yaml
> create mode 100644 drivers/clk/sophgo/clk-sg2044.c
> create mode 100644 drivers/clk/sophgo/clk-sg2044.h
> create mode 100644 include/dt-bindings/clock/sophgo,sg2044-clk.h
>
> --
> 2.48.1
>
Hi Stephen,
Would you like to share some suggestions on this patch?
Regards,
Inochi
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