linux-kernel - [PATCH v2 13/15] cxl/x86: Prepare for architectural platform setup

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Message-ID: <20250218132356.1809075-14-rrichter@amd.com>
Date: Tue, 18 Feb 2025 14:23:54 +0100
From: Robert Richter <rrichter@....com>
To: Alison Schofield <alison.schofield@...el.com>, Vishal Verma
	<vishal.l.verma@...el.com>, Ira Weiny <ira.weiny@...el.com>, Dan Williams
	<dan.j.williams@...el.com>, Jonathan Cameron <Jonathan.Cameron@...wei.com>,
	Dave Jiang <dave.jiang@...el.com>, Davidlohr Bueso <dave@...olabs.net>
CC: <linux-cxl@...r.kernel.org>, <linux-kernel@...r.kernel.org>, Gregory Price
	<gourry@...rry.net>, "Fabio M. De Francesco"
	<fabio.m.de.francesco@...ux.intel.com>, Terry Bowman <terry.bowman@....com>,
	Robert Richter <rrichter@....com>
Subject: [PATCH v2 13/15] cxl/x86: Prepare for architectural platform setup

In preparation of an architectural, vendor and platform specific port
setup, add a function arch_cxl_port_platform_setup() that can be used
to handle and implement architecture and platform specific code.

Signed-off-by: Robert Richter <rrichter@....com>
---
 drivers/cxl/core/Makefile     |  2 ++
 drivers/cxl/core/core.h       |  1 +
 drivers/cxl/core/port.c       |  4 ++++
 drivers/cxl/core/x86/common.c | 12 ++++++++++++
 4 files changed, 19 insertions(+)
 create mode 100644 drivers/cxl/core/x86/common.c

diff --git a/drivers/cxl/core/Makefile b/drivers/cxl/core/Makefile
index 9259bcc6773c..db1d16d39037 100644
--- a/drivers/cxl/core/Makefile
+++ b/drivers/cxl/core/Makefile
@@ -16,3 +16,5 @@ cxl_core-y += pmu.o
 cxl_core-y += cdat.o
 cxl_core-$(CONFIG_TRACING) += trace.o
 cxl_core-$(CONFIG_CXL_REGION) += region.o
+
+cxl_core-$(CONFIG_X86)		+= x86/common.o
diff --git a/drivers/cxl/core/core.h b/drivers/cxl/core/core.h
index a20ea2b7d1a4..e2955f91fd98 100644
--- a/drivers/cxl/core/core.h
+++ b/drivers/cxl/core/core.h
@@ -118,5 +118,6 @@ int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,
 					struct access_coordinate *c);
 
 int cxl_gpf_port_setup(struct device *dport_dev, struct cxl_port *port);
+void arch_cxl_port_platform_setup(struct cxl_port *port);
 
 #endif /* __CXL_CORE_H__ */
diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
index d19930c009ce..e94671ea8455 100644
--- a/drivers/cxl/core/port.c
+++ b/drivers/cxl/core/port.c
@@ -841,6 +841,8 @@ static void cxl_debugfs_create_dport_dir(struct cxl_dport *dport)
 			    &cxl_einj_inject_fops);
 }
 
+void __weak arch_cxl_port_platform_setup(struct cxl_port *port) { }
+
 static int cxl_port_add(struct cxl_port *port,
 			resource_size_t component_reg_phys,
 			struct cxl_dport *parent_dport)
@@ -878,6 +880,8 @@ static int cxl_port_add(struct cxl_port *port,
 			return rc;
 	}
 
+	arch_cxl_port_platform_setup(port);
+
 	rc = device_add(dev);
 	if (rc)
 		return rc;
diff --git a/drivers/cxl/core/x86/common.c b/drivers/cxl/core/x86/common.c
new file mode 100644
index 000000000000..eeb9bdadb26d
--- /dev/null
+++ b/drivers/cxl/core/x86/common.c
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2025 Advanced Micro Devices, Inc.
+ */
+
+#include <cxl.h>
+
+#include "../core.h"
+
+void arch_cxl_port_platform_setup(struct cxl_port *port)
+{
+}
-- 
2.39.5