linux-kernel - Re: [PATCH] riscv: dts: allwinner: d1: Add CPU thermal sensor and zone

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Message-ID: <4628970.LvFx2qVVIh@jernej-laptop>
Date: Tue, 18 Feb 2025 18:23:52 +0100
From: Jernej Škrabec <jernej.skrabec@...il.com>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Chen-Yu Tsai <wens@...e.org>, Samuel Holland <samuel@...lland.org>,
 Alex Studer <alex@...der.dev>
Cc: devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
 linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
 linux-kernel@...r.kernel.org, Alex Studer <alex@...der.dev>
Subject:
 Re: [PATCH] riscv: dts: allwinner: d1: Add CPU thermal sensor and zone

Dne torek, 18. februar 2025 ob 03:06:29 Srednjeevropski standardni čas je Alex Studer napisal(a):
> The sun20i THS (built in CPU thermal sensor) is supported in code, but
> was never added to the device tree. So, add it to the device tree,
> along with a thermal zone for the CPU.
> 
> Signed-off-by: Alex Studer <alex@...der.dev>
> ---
>  arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 31 +++++++++++++++++++
>  .../boot/dts/allwinner/sunxi-d1s-t113.dtsi    | 16 ++++++++++
>  2 files changed, 47 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> index 6367112e6..bdde82aa8 100644
> --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
> @@ -3,6 +3,8 @@
>  
>  #define SOC_PERIPHERAL_IRQ(nr)	(nr + 16)
>  
> +#include <dt-bindings/thermal/thermal.h>

Put above line on top (before SOC_PERIPHERAL_IRQ()).

> +
>  #include "sunxi-d1s-t113.dtsi"
>  
>  / {
> @@ -115,4 +117,33 @@ pmu {
>  			<0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>,
>  			<0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
>  	};
> +
> +	thermal-zones {
> +		cpu-thermal {
> +			polling-delay-passive = <0>;
> +			polling-delay = <0>;
> +			thermal-sensors = <&ths>;
> +
> +			cooling-maps {
> +				map0 {
> +					trip = <&cpu_alert>;
> +					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +				};
> +			};
> +
> +			trips {
> +				cpu_alert: cpu-alert {
> +					temperature = <85000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				cpu-crit {
> +					temperature = <100000>;
> +					hysteresis = <0>;
> +					type = "critical";
> +				};

Where do those limits come from?

> +			};
> +		};
> +	};
>  };
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> index e4175adb0..fcfcaf06c 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
> @@ -426,6 +426,10 @@ sid: efuse@...6000 {
>  			reg = <0x3006000 0x1000>;
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> +
> +			ths_calibration: thermal-sensor-calibration@14 {
> +				reg = <0x14 0x8>;
> +			};
>  		};
>  
>  		crypto: crypto@...0000 {
> @@ -934,5 +938,17 @@ rtc: rtc@...0000 {
>  			clock-names = "bus", "hosc", "ahb";
>  			#clock-cells = <1>;
>  		};
> +
> +		ths: thermal-sensor@...9400 {
> +			compatible = "allwinner,sun20i-d1-ths";
> +			reg = <0x2009400 0x100>;

Size should be 0x400.

Best regards,
Jernej

> +			interrupts = <SOC_PERIPHERAL_IRQ(58) IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&ccu CLK_BUS_THS>;
> +			clock-names = "bus";
> +			resets = <&ccu RST_BUS_THS>;
> +			nvmem-cells = <&ths_calibration>;
> +			nvmem-cell-names = "calibration";
> +			#thermal-sensor-cells = <0>;
> +		};
>  	};
>  };
>