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Message-ID: <Z7TN/QmQayhNrMGc@nvidia.com>
Date: Tue, 18 Feb 2025 10:14:21 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: Jason Gunthorpe <jgg@...dia.com>
CC: <kevin.tian@...el.com>, <corbet@....net>, <will@...nel.org>,
	<joro@...tes.org>, <suravee.suthikulpanit@....com>, <robin.murphy@....com>,
	<dwmw2@...radead.org>, <baolu.lu@...ux.intel.com>, <shuah@...nel.org>,
	<linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kselftest@...r.kernel.org>,
	<linux-doc@...r.kernel.org>, <eric.auger@...hat.com>,
	<jean-philippe@...aro.org>, <mdf@...nel.org>, <mshavit@...gle.com>,
	<shameerali.kolothum.thodi@...wei.com>, <smostafa@...gle.com>,
	<ddutile@...hat.com>, <yi.l.liu@...el.com>, <patches@...ts.linux.dev>
Subject: Re: [PATCH v6 14/14] iommu/arm-smmu-v3: Set MEV bit in nested STE
 for DoS mitigations

On Tue, Feb 18, 2025 at 01:21:20PM -0400, Jason Gunthorpe wrote:
> On Fri, Jan 24, 2025 at 04:30:43PM -0800, Nicolin Chen wrote:
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -1051,7 +1051,7 @@ void arm_smmu_get_ste_used(const __le64 *ent, __le64 *used_bits)
> >  			cpu_to_le64(STRTAB_STE_1_S1DSS | STRTAB_STE_1_S1CIR |
> >  				    STRTAB_STE_1_S1COR | STRTAB_STE_1_S1CSH |
> >  				    STRTAB_STE_1_S1STALLD | STRTAB_STE_1_STRW |
> > -				    STRTAB_STE_1_EATS);
> > +				    STRTAB_STE_1_EATS | STRTAB_STE_1_MEV);
> >  		used_bits[2] |= cpu_to_le64(STRTAB_STE_2_S2VMID);
> 
> You also ran the test suite?

Yes, I enabled that in my config, and didn't see anything wrong:

[   10.832738]     # Subtest: arm-smmu-v3-kunit-test
[   10.837549]     # module: arm_smmu_v3_test
[   10.844208]     ok 1 arm_smmu_v3_write_ste_test_bypass_to_abort
[   10.844339]     ok 2 arm_smmu_v3_write_ste_test_abort_to_bypass
[   10.850507]     ok 3 arm_smmu_v3_write_ste_test_cdtable_to_abort
[   10.856669]     ok 4 arm_smmu_v3_write_ste_test_abort_to_cdtable
[   10.862934]     ok 5 arm_smmu_v3_write_ste_test_cdtable_to_bypass
[   10.869200]     ok 6 arm_smmu_v3_write_ste_test_bypass_to_cdtable
[   10.875550]     ok 7 arm_smmu_v3_write_ste_test_cdtable_s1dss_change
[   10.881899]     ok 8 arm_smmu_v3_write_ste_test_s1dssbypass_to_stebypass
[   10.888512]     ok 9 arm_smmu_v3_write_ste_test_stebypass_to_s1dssbypass
[   10.895482]     ok 10 arm_smmu_v3_write_ste_test_s2_to_abort
[   10.902457]     ok 11 arm_smmu_v3_write_ste_test_abort_to_s2
[   10.908355]     ok 12 arm_smmu_v3_write_ste_test_s2_to_bypass
[   10.914263]     ok 13 arm_smmu_v3_write_ste_test_bypass_to_s2
[   10.920269]     ok 14 arm_smmu_v3_write_ste_test_s1_to_s2
[   10.926267]     ok 15 arm_smmu_v3_write_ste_test_s2_to_s1
[   10.931900]     ok 16 arm_smmu_v3_write_ste_test_non_hitless
[   10.937536]     ok 17 arm_smmu_v3_write_cd_test_s1_clear
[   10.943435]     ok 18 arm_smmu_v3_write_cd_test_s1_change_asid
[   10.948995]     ok 19 arm_smmu_v3_write_ste_test_s1_to_s2_stall
[   10.955074]     ok 20 arm_smmu_v3_write_ste_test_s2_to_s1_stall
[   10.961244]     ok 21 arm_smmu_v3_write_cd_test_sva_clear
[   10.967419]     ok 22 arm_smmu_v3_write_cd_test_sva_release
[   10.972941] # arm-smmu-v3-kunit-test: pass:22 fail:0 skip:0 total:22
[   10.985141] ok 1 arm-smmu-v3-kunit-test

Thanks
Nicolin

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