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Message-ID: <20250218184558.yxqy3sbz4muypwwd@busybody>
Date: Tue, 18 Feb 2025 12:45:58 -0600
From: Nishanth Menon <nm@...com>
To: Sebastian LaVine <slavine@...mbedded.com>
CC: <devicetree@...r.kernel.org>, <imx@...ts.linux.dev>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-media@...r.kernel.org>,
Nícolas F. R. A. Prado
<nfraprado@...labora.com>,
Abel Vesa <abel.vesa@...aro.org>, Achath Vaishnav
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Biju Das
<biju.das.jz@...renesas.com>,
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Montmasson <elinor.montmasson@...oirfairelinux.com>,
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Hans
Verkuil <hverkuil@...all.nl>,
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Zhi Mao <zhi.mao@...iatek.com>
Subject: Re: [PATCH 3/4] arm64: dts: ti: k3-am62a7-sk: Add overlay for fusion
2 board
On 14:56-20250212, Sebastian LaVine wrote:
> Adds an overlay for the Fusion 2 (FPD-Link IV) board on SK-AM62A.
>
> Signed-off-by: Sebastian LaVine <slavine@...mbedded.com>
> Mentored-by: Stuart Burtner <sburtner@...mbedded.com>
> ---
> MAINTAINERS | 1 +
> arch/arm64/boot/dts/ti/Makefile | 1 +
> .../boot/dts/ti/k3-am62a7-sk-fusion-2.dtso | 115 ++++++++++++++++++
> 3 files changed, 117 insertions(+)
> create mode 100644 arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 27fb3c1be732..bf6a48da0887 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -21890,6 +21890,7 @@ M: Stuart Burtner <sburtner@...mbedded.com>
> L: linux-media@...r.kernel.org
> S: Odd Fixes
> F: Documentation/devicetree/bindings/media/i2c/sony,imx728.yaml
> +F: arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
NAK. please do not send overlays from media tree. they should go via SoC
ARM tree.
> F: drivers/media/i2c/imx728.c
>
> SONY MEMORYSTICK SUBSYSTEM
> diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
> index f71360f14f23..fcd8d11e5678 100644
> --- a/arch/arm64/boot/dts/ti/Makefile
> +++ b/arch/arm64/boot/dts/ti/Makefile
> @@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo
> # Boards with AM62Ax SoC
> dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
> dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
> +dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk-fusion-2.dtbo
>
> # Boards with AM62Px SoC
> dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso b/arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
> new file mode 100644
> index 000000000000..68e06d643bfd
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
> @@ -0,0 +1,115 @@
> +// SPDX-License-Identifier: GPL-2.0
Would prefer GPL-2.0 OR MIT in line with rest of TI EVM licensing for
DT.
> +/*
> + * DT Overlay for Fusion 2 (FPD-Link IV) board on SK-AM62A
> + * https://www.ti.com/tool/J7EXPAXEVM/
> + *
> + * Copyright (C) 2024 D3 Embedded - https://www.d3embedded.com
> + */
> +
> + /dts-v1/;
> + /plugin/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +
That said, the fusion-2 board interfaces with a bunch of evms as well.
wondering if we should re-organize to better reuse stuff.
> +&{/} {
> + clk_fusion2_25M_fixed: fixed-clock-25M {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <25000000>;
> + };
> +};
> +
> +&exp2 {
> + p9-hog {
> + /* P9 - CSI_RSTz */
> + gpio-hog;
> + gpios = <9 GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "CSI_RSTz";
> + };
> +
> + p19-hog {
> + /* P19 -CSI_SEL2 */
> + gpio-hog;
> + gpios = <19 GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "CSI_SEL2";
> + };
> +};
> +
> +&main_i2c2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + i2c-switch@71 {
> + compatible = "nxp,pca9543";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> +
> + i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + deser@3d {
> + compatible = "ti,ds90ub9702-q1";
> + reg = <0x3d>;
> +
> + clock-names = "refclk";
> + clocks = <&clk_fusion2_25M_fixed>;
> +
> + i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
> +
> + ds90ub9702_0_ports: ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* CSI-2 TX */
> + port@4 {
> + reg = <4>;
> + ds90ub9702_0_csi_out: endpoint {
> + data-lanes = <1 2 3 4>;
> + clock-lanes = <0>;
> + link-frequencies = /bits/ 64 <800000000>;
> + remote-endpoint = <&csi2_phy0>;
> + };
> + };
> + };
> +
> + ds90ub9702_0_links: links {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> + };
> + };
> + };
> +};
> +
> +&cdns_csi2rx0 {
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + csi0_port0: port@0 {
> + reg = <0>;
> + status = "okay";
> +
> + csi2_phy0: endpoint {
> + remote-endpoint = <&ds90ub9702_0_csi_out>;
> + data-lanes = <1 2 3 4>;
> + clock-lanes = <0>;
> + link-frequencies = /bits/ 64 <800000000>;
> + };
> + };
> + };
> +};
> +
> +&ti_csi2rx0 {
> + status = "okay";
> +};
> +
> +&dphy0 {
> + status = "okay";
> +};
> --
> 2.34.1
>
> Please be aware that this email includes email addresses outside of the organization.
Drop this. this is already a public mailing list :)
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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