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Message-ID: <20250219161934.GH337534@yaz-khff2.amd.com>
Date: Wed, 19 Feb 2025 11:19:34 -0500
From: Yazen Ghannam <yazen.ghannam@....com>
To: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
Cc: "x86@...nel.org" <x86@...nel.org>, "Luck, Tony" <tony.luck@...el.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
"Smita.KoralahalliChannabasappa@....com" <Smita.KoralahalliChannabasappa@....com>
Subject: Re: [PATCH v2 15/16] x86/mce/amd: Support SMCA Corrected Error
Interrupt
On Tue, Feb 18, 2025 at 01:27:04PM +0000, Zhuo, Qiuxu wrote:
> > From: Yazen Ghannam <yazen.ghannam@....com>
> > [...]
> > --- a/arch/x86/kernel/cpu/mce/amd.c
> > +++ b/arch/x86/kernel/cpu/mce/amd.c
> > @@ -306,6 +306,11 @@ static void smca_configure(unsigned int bank,
> > unsigned int cpu)
> > high |= BIT(5);
> > }
> >
>
> Do you think it would be better to have some comments on the thresholding
> interrupt here (as the bits 10/8 look like magic numbers), similar to the
> comments above for the deferred interrupt?
>
> > + if ((low & BIT(10)) && data->thr_intr_en) {
> > + __set_bit(bank, data->thr_intr_banks);
> > + high |= BIT(8);
> > + }
> > +
> > [...]
Yes, I'd like to convert these to defines. I left that idea, for now, to
simplify the changes.
Thanks,
Yazen
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