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Message-ID: <a9ab6b36-0801-430d-87e4-c02538510127@oss.qualcomm.com>
Date: Wed, 19 Feb 2025 10:16:55 -0800
From: Anjelique Melendez <anjelique.melendez@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: amitk@...nel.org, thara.gopinath@...il.com, rafael@...nel.org,
        daniel.lezcano@...aro.org, rui.zhang@...el.com, lukasz.luba@....com,
        david.collins@....qualcomm.com, linux-arm-msm@...r.kernel.org,
        linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] thermal: qcom-spmi-temp-alarm: add support for LITE
 PMIC peripherals

On 2/13/2025 2:09 PM, Dmitry Baryshkov wrote:
> On Thu, Feb 13, 2025 at 01:04:03PM -0800, Anjelique Melendez wrote:
>> Add support for TEMP_ALARM LITE PMIC peripherals. This subtype
>> utilizes a pair of registers to configure a warning interrupt
>> threshold temperature and an automatic hardware shutdown
>> threshold temperature.
>>
>> Signed-off-by: David Collins <david.collins@....qualcomm.com>
>> Signed-off-by: Anjelique Melendez <anjelique.melendez@....qualcomm.com>
>> ---
>>   drivers/thermal/qcom/qcom-spmi-temp-alarm.c | 204 +++++++++++++++++++-
>>   1 file changed, 203 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
>> index a10f368f2039..081db1a85b8a 100644
>> --- a/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
>> +++ b/drivers/thermal/qcom/qcom-spmi-temp-alarm.c
>> @@ -22,6 +22,7 @@
>>   #define QPNP_TM_REG_TYPE		0x04
>>   #define QPNP_TM_REG_SUBTYPE		0x05
>>   #define QPNP_TM_REG_STATUS		0x08
>> +#define QPNP_TM_REG_IRQ_STATUS		0x10
> 
> Is it a generic register or a LITE one?
> 

This is generic register. All temp alarm devices have this IRQ status 
register at 0x10 offset but only temp alarm LITE devices read this register

Thanks,
Anjelique


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