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Message-ID: <20250219231036.GA3137058-robh@kernel.org>
Date: Wed, 19 Feb 2025 17:10:36 -0600
From: Rob Herring <robh@...nel.org>
To: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Zhang Rui <rui.zhang@...el.com>, Lukasz Luba <lukasz.luba@....com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
Sebastian Reichel <sebastian.reichel@...labora.com>,
kernel@...labora.com, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/6] dt-bindings: thermal: rockchip: document otp thermal
trim
On Sun, Feb 16, 2025 at 12:34:53AM +0100, Nicolas Frattaroli wrote:
> Several Rockchip SoCs, such as the RK3576, can store calibration trim
> data for thermal sensors in OTP cells. This capability should be
> documented.
Is several most or a minority as this change is enabled for everyone.
>
> Such a rockchip thermal sensor may reference cell handles that store
> both a chip-wide trim for all the sensors, as well as cell handles
> for each individual sensor channel pointing to that specific sensor's
> trim value.
>
> Additionally, the thermal sensor may optionally reference cells which
> store the base in terms of degrees celsius and decicelsius that the trim
> is relative to.
>
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
> ---
> .../bindings/thermal/rockchip-thermal.yaml | 44 ++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> index 49ceed68c92ce5a32ed8d4f39bd88fd052de0e80..8d27ddefcc64e29f0faab059888805802c948b41 100644
> --- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> +++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
> @@ -40,6 +40,21 @@ properties:
> - const: tsadc
> - const: apb_pclk
>
> + nvmem-cells:
> + items:
> + - description: cell handle of the low byte of the chip fallback trim value
> + - description: cell handle of the high byte of the chip fallback trim value
> + - description: cell handle to where the trim's base temperature is stored
> + - description:
> + cell handle to where the trim's tenths of Celsius base value is stored
> +
> + nvmem-cell-names:
> + enum:
> + - trim_l
> + - trim_h
> + - trim_base
> + - trim_base_frac
> +
> resets:
> minItems: 1
> maxItems: 3
> @@ -51,6 +66,12 @@ properties:
> - const: tsadc
> - const: tsadc-phy
>
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> "#thermal-sensor-cells":
> const: 1
>
> @@ -72,6 +93,29 @@ properties:
> $ref: /schemas/types.yaml#/definitions/uint32
> enum: [0, 1]
>
> +patternProperties:
> + "^([a-z]+)@[0-9]+$":
If each node is a sensor or channel, then make that the node name.
> + type: object
> + properties:
> + reg:
> + maxItems: 1
> + description: sensor ID, a.k.a. channel number
> +
> + nvmem-cells:
> + items:
> + - description: handle of cell containing low byte of calibration data
> + - description: handle of cell containing high byte of calibration data
> +
> + nvmem-cell-names:
> + items:
> + - const: trim_l
> + - const: trim_h
> +
> + required:
> + - reg
> +
> + unevaluatedProperties: false
> +
> required:
> - compatible
> - reg
>
> --
> 2.48.1
>
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