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Message-ID: <75f74b7d-659-7c51-9ee5-6cb7b1bafeac@linux.intel.com>
Date: Wed, 19 Feb 2025 15:53:25 -0800 (PST)
From: matthew.gerlach@...ux.intel.com
To: Krzysztof Kozlowski <krzk@...nel.org>
cc: lpieralisi@...nel.org, kw@...ux.com, manivannan.sadhasivam@...aro.org, 
    robh@...nel.org, bhelgaas@...gle.com, krzk+dt@...nel.org, 
    conor+dt@...nel.org, dinguyen@...nel.org, joyce.ooi@...el.com, 
    linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
    linux-kernel@...r.kernel.org, matthew.gerlach@...era.com, 
    peter.colberg@...era.com
Subject: Re: [PATCH v7 3/7] arm64: dts: agilex: Fix fixed-clock schema
 warnings



On Tue, 18 Feb 2025, matthew.gerlach@...ux.intel.com wrote:

>
>
> On Sun, 16 Feb 2025, Krzysztof Kozlowski wrote:
>
>> On Sat, Feb 15, 2025 at 09:53:55AM -0600, Matthew Gerlach wrote:
>>> All Agilex SoCs have the fixed-clocks defined in socfpga_agilex.dsti,
>> 
>> 
>> That's not what I asked / talked about. If the clocks are in SoC, they
>> cannot be disabled.
>
> There are two clocks, cb_intoosc_hs_div2_clk and cb_intosc_ls_clk, in the SoC 
> with a known frequency. These warnings can be fixed in the DTSI.
>
>> 
>> If they clocks are not in SoC, they should not be in DTSI.
>
> The two clocks, f2s_free_clk and osc1, are not in the SoC; so they should be 
> removed from DTSI.

Since these clock changes are not directly related to adding PCIe Root 
Port support to Agilex chips, I think they should be in their patch set.

Matthew Gerlach

>
>> 
>> These were my statements last time and this patch does not comple.
>> Commit msg does not explain why this should be done differently.
>> 
>> Best regards,
>> Krzysztof
>> 
>> 
>
> Thanks for the feedback,
> Matthew Gerlach
>

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