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Message-ID: <CAHgNfTwmR57GyiMk+-_x3jVNjxCpgLvS4dY2wbZkJN68PgSdjQ@mail.gmail.com>
Date: Wed, 19 Feb 2025 14:47:04 +1000
From: James Calligeros <jcalligeros99@...il.com>
To: Mark Brown <broonie@...nel.org>
Cc: Liam Girdwood <lgirdwood@...il.com>, Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
Shenghao Ding <shenghao-ding@...com>, Kevin Lu <kevin-lu@...com>, Baojun Xu <baojun.xu@...com>,
Dan Murphy <dmurphy@...com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Shi Fu <shifu0704@...ndersoft.com>, Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>, Alyssa Rosenzweig <alyssa@...enzweig.io>,
Martin Povišer <povik+lin@...ebit.org>,
Hector Martin <marcan@...can.st>, linux-sound@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
asahi@...ts.linux.dev, linux-hwmon@...r.kernel.org,
Neal Gompa <neal@...pa.dev>
Subject: Re: [PATCH v2 20/29] ASoC: tas2764: Add SDZ regulator
Hi Mark,
On Wed, Feb 19, 2025 at 1:33 AM Mark Brown <broonie@...nel.org> wrote:
>
> On Tue, Feb 18, 2025 at 06:35:54PM +1000, James Calligeros wrote:
>
> > Multiple amps can be connected to the same SDZ GPIO. Using raw GPIOs for
> > this breaks, as there is no concept of refcounting/sharing. In order to
> > model these platforms, introduce support for an SDZ "regulator". This
> > allows us to represent the SDZ GPIO as a simple regulator-fixed, and
> > then the regulator core takes care of refcounting so that all codecs are
> > only powered down once all the driver instances are in the suspend
> > state.
>
> I get that the reference counting that the regulator API does is useful
> here but this isn't a regulator so shouldn't be exposed as such,
> particularly since this winds up being visible in the DT ABI. I
> could've sworn that someone did some helpers for this case but now I go
> looking I can't find them, we certainly don't use any in the regulator
> core.
>From what I recall, no attempt at shared GPIO infrastructure has actually
landed. The multiple {de}assertions of SDZ put each chip on the same line
into an unusable state that requires a full power cycle to clear, so
we can't live without
handling the shared GPIO somewhat sensibly.
One alternative off the top of my head is adding a dummy reset controller
to the DTs and integrating it into the ASoC machine driver (which we have
downstream). We could then put the GPIO behind a shared reset line, and hit
that instead of the GPIO. This does seem a little complex/odd, and IIRC we
considered this at some point and decided against it.
Is there any other option that may work here? I'm open to ideas.
Regards,
James
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