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Message-ID: <dac33c2d-3bba-4ea6-8a20-12ff9b6ebbb3@linaro.org>
Date: Wed, 19 Feb 2025 08:00:25 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Andi Shyti <andi.shyti@...nel.org>,
Stephan Gerhold <stephan.gerhold@...nkonzept.com>
Cc: Wolfram Sang <wsa@...nel.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-i2c@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] i2c: qup: Vote for interconnect bandwidth to DRAM
On 19/02/2025 00:02, Andi Shyti wrote:
> Hi Stephen,
>
> sorry for the very late reply here. Just one question.
>
> ...
>
>> downstream/vendor driver [1]. Due to lack of documentation about the
>> interconnect setup/behavior I cannot say exactly if this is right.
>> Unfortunately, this is not implemented very consistently downstream...
>
> Can we have someone from Qualcomm or Linaro taking a peak here?
You replied to some old email, not in my inbox anymore, but your quote
lacks standard quote-template, like:
On 19/02/2025 00:02, Andi Shyti wrote:
so I really don't know when was it sent. For sure more than a month ago,
maybe more? This has to be resent if you want anything done here.
Best regards,
Krzysztof
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