linux-kernel - [tip: perf/core] perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h header with the kernel

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <173996290231.10177.11960731856088166114.tip-bot2@tip-bot2>
Date: Wed, 19 Feb 2025 11:01:39 -0000
From: "tip-bot2 for Ravi Bangoria" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Ravi Bangoria <ravi.bangoria@....com>,
 "Peter Zijlstra (Intel)" <peterz@...radead.org>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: perf/core] perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h
 header with the kernel

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     3201bfa368fee5e70927e45222ff0b235352c01c
Gitweb:        https://git.kernel.org/tip/3201bfa368fee5e70927e45222ff0b235352c01c
Author:        Ravi Bangoria <ravi.bangoria@....com>
AuthorDate:    Wed, 05 Feb 2025 06:05:43 
Committer:     Peter Zijlstra <peterz@...radead.org>
CommitterDate: Mon, 17 Feb 2025 15:20:05 +01:00

perf amd ibs: Sync arch/x86/include/asm/amd-ibs.h header with the kernel

Sync load latency related bit fields into the tool's header copy

Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Link: https://lkml.kernel.org/r/20250205060547.1337-4-ravi.bangoria@amd.com
---
 tools/arch/x86/include/asm/amd-ibs.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/arch/x86/include/asm/amd-ibs.h b/tools/arch/x86/include/asm/amd-ibs.h
index 93807b4..cb1740b 100644
--- a/tools/arch/x86/include/asm/amd-ibs.h
+++ b/tools/arch/x86/include/asm/amd-ibs.h
@@ -64,7 +64,8 @@ union ibs_op_ctl {
 			opmaxcnt_ext:7,	/* 20-26: upper 7 bits of periodic op maximum count */
 			reserved0:5,	/* 27-31: reserved */
 			opcurcnt:27,	/* 32-58: periodic op counter current count */
-			reserved1:5;	/* 59-63: reserved */
+			ldlat_thrsh:4,	/* 59-62: Load Latency threshold */
+			ldlat_en:1;	/* 63: Load Latency enabled */
 	};
 };