linux-kernel - Re: [PATCH] arm: clk: Add ETH switch clock description for vf610 SoC

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Message-ID: <5a9d9eef-f2ca-4168-aca4-4419dcfcacb6@lunn.ch>
Date: Thu, 20 Feb 2025 14:39:24 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Lukasz Majewski <lukma@...x.de>
Cc: Abel Vesa <abelvesa@...nel.org>, Peng Fan <peng.fan@....com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, linux-clk@...r.kernel.org,
	imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH] arm: clk: Add ETH switch clock description for vf610 SoC

On Wed, Feb 19, 2025 at 11:38:02PM +0100, Lukasz Majewski wrote:
> Hi Andrew,
> 
> > On Wed, Feb 19, 2025 at 12:49:36PM +0100, Lukasz Majewski wrote:
> > > The NXP's vf610 soc is equipped with L2 switch IP block from More
> > > Than IP (MTIP) vendor.
> > > 
> > > It requires special clock (VF610_CLK_ESW) to be operational.  
> > 
> > So you have a driver for this switch? It has been talked about in the
> > past, but nobody made any progress with it. Ah, it was you in 2020.
> 
> Yes, I'm going to try another time to upstream it.... :-)
> 
> > It
> > will be interesting to see what you came up with in the end, pure
> > switchdev or a DSA driver.
> 
> I think it would be:
> 
> 1. Standalone driver, which would configure the L2 switch from the very
> beginning to work (this is different from FEC on imx28/vf610 where
> switch is bypassed)
> 
> 2. It will use the in-switch registers to have two network interfaces
> separated. As a result - it may be slower than the fec_main.c in this
> use case.

Seems like a reasonable compromise. You would only load this driver if
you intend to make use of the switch...

> 3. When somebody call "bridge ..." on it - then the in-switch
> separation would be disabled. This is the "normal" state of operation
> for L2 switch, which would be a HW accelerator for bridging.
> 
> 4. The switchdev would be used to manage it
> 
> 5. This would be just a very simple driver - just bridging and startup
> of the L2 switch.
> 
> After we would have a consensus (i.e. it would be pulled to mainline) -
> I would proceed further.
> 
> I will try to not touch fec_main.c driver - just write standalone, new
> for MoreThanIP L2 switch driver.

It might make sense to refactor the MDIO code into a helper which both
can share? No point duplicating that.

> If somebody would like to use FEC, then he will insert the proper
> module. If switch, another one can be inserted, depending o the target
> use case.

This all seems like a reasonable way forward.

MoreThanIP is now part of Synopsys. I wounder if this IP now exists in
other SoCs? The press release however suggests Synopsys was
interesting in the high speed interfaces, not a two ports Fast
Ethernet switch.

	Andrew