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Message-ID: <20250220153337.GB2510987@rocinante>
Date: Fri, 21 Feb 2025 00:33:37 +0900
From: Krzysztof WilczyĆski <kw@...ux.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: lpieralisi@...nel.org, robh@...nel.org, bhelgaas@...gle.com,
andersson@...nel.org, konradybcio@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, stable+noautosel@...nel.org,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Subject: Re: [PATCH 2/2] PCI: qcom-ep: Mark BAR0/BAR2 as 64bit BARs and
BAR1/BAR3 as RESERVED
Hello,
> On all Qcom endpoint SoCs, BAR0/BAR2 are 64bit BARs by default and software
> cannot change the type. So mark the those BARs as 64bit BARs and also mark
> the successive BAR1/BAR3 as RESERVED BARs so that the EPF drivers cannot
> use them.
Applied to controller/qcom, thank you!
Krzysztof
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