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Message-ID: <6d4e65b9-1392-46e9-ac2e-0c4ef2239fa0@baylibre.com>
Date: Thu, 20 Feb 2025 13:30:11 -0600
From: David Lechner <dlechner@...libre.com>
To: Antoniu Miclaus <antoniu.miclaus@...log.com>, jic23@...nel.org,
robh@...nel.org, conor+dt@...nel.org, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 12/14] dt-bindings: iio: adc: add ad4080
On 2/20/25 7:54 AM, Antoniu Miclaus wrote:
> Add devicetree bindings for ad4080 family.
>
> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@...log.com>
> ---
> .../bindings/iio/adc/adi,ad4080.yaml | 92 +++++++++++++++++++
> 1 file changed, 92 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> new file mode 100644
> index 000000000000..e0ea712b8457
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml
> @@ -0,0 +1,92 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright 2025 Analog Devices Inc.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/iio/adc/adi,ad4080.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Analog Devices AD4080 20-Bit, 40 MSPS, Differential SAR ADC
> +
> +maintainers:
> + - Antoniu Miclaus <antoniu.miclaus@...log.com>
> +
> +description: |
> + The AD4080 is a high speed, low noise, low distortion, 20-bit, Easy Drive,
> + successive approximation register (SAR) analog-to-digital converter (ADC).
> + Maintaining high performance (signal-to-noise and distortion (SINAD) ratio
> + > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to
> + service a wide variety of precision, wide bandwidth data acquisition
> + applications.
> +
> + https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
> +
> +$ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +properties:
> + compatible:
> + enum:
> + - adi,ad4080
> +
> + reg:
> + maxItems: 1
> +
> + spi-max-frequency:
> + maximum: 50000000
Since there are potentially two independent SPI busses on this chip
(one for configuration, one for data) it might be a good idea to put
in a description somewhere that these SPI properties are for the
configuration SPI bus.
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + items:
> + - const: adc-clk
Clocks don't need a name if there is only one clock.
But the description of clocks should say which pin you mean.
Is the the CLK+/- pins or the CNV+/- pins?
> +
> + vdd33-supply: true
> +
> + vdd11-supply: true
> +
> + vddldo-supply: true
> +
> + iovdd-supply: true
> +
> + vrefin-supply: true
I would expect we need a vendor boolean property to say if the
DCO+/- pins are wired or not for the echoed clock.
And what does the CNV trigger get wired to? We probably need a
vendor boolean property to say if it is wired to something CMOS
or LVDS. Plus maybe a pwms property or whatever makes sense for
whatever kind of signal generator it is connected to.
> +
> + adi,num-lanes:
> + description:
> + Nmber of lanes on which the data is sent on the output (DA, DB pins).
s/Nmber/Number/
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [1, 2]
> + default: 1
> +
Also, don't we need io-backends for the data interface?
We can also add gpio-controller and #gpio-cells since this
chips provides GPIOs.
> +required:
> + - compatible
> + - reg
> + - clocks
Assuming clocks is CLK+/- pins, this should be optional since
the pins are used for a different function in SPI mode.
> + - clock-names
> + - vdd33-supply
> + - vdd11-supply
> + - vddldo-supply
> + - iovdd-supply
> + - vrefin-supply
The datasheet says things like, "If VDDLDO is connected to a
voltage source, neither VDD11 nor IOVDD should be connected to
any external voltage source.". So making all supplies required
doesn't seem correct.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adc@0 {
> + compatible = "adi,ad4080";
> + reg = <0>;
> + spi-max-frequency = <10000000>;
> + vdd33-supply = <&vdd33>;
> + vdd11-supply = <&vdd11>;
> + vddldo-supply = <&vddldo>;
> + iovdd-supply = <&iovdd>;
> + vrefin-supply = <&vrefin>;
> + clocks = <&adc_clk>;
> + clock-names = "adc-clk";
> + };
> + };
> +...
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