linux-kernel - RE: [PATCH 3/8] dt-bindings: media: nxp: Add Wave6 video codec device

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Message-ID:
 <SL2P216MB1246F270DDE8CC8E21EA1DDCFBC42@SL2P216MB1246.KORP216.PROD.OUTLOOK.COM>
Date: Thu, 20 Feb 2025 07:35:58 +0000
From: Nas Chung <nas.chung@...psnmedia.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: "mchehab@...nel.org" <mchehab@...nel.org>, "hverkuil@...all.nl"
	<hverkuil@...all.nl>, "sebastian.fricke@...labora.com"
	<sebastian.fricke@...labora.com>, "robh@...nel.org" <robh@...nel.org>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "conor+dt@...nel.org"
	<conor+dt@...nel.org>, "linux-media@...r.kernel.org"
	<linux-media@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-imx@....com" <linux-imx@....com>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, jackson.lee
	<jackson.lee@...psnmedia.com>, lafley.kim <lafley.kim@...psnmedia.com>
Subject: RE: [PATCH 3/8] dt-bindings: media: nxp: Add Wave6 video codec device

Hi, Krzysztof.

>-----Original Message-----
>From: Krzysztof Kozlowski <krzk@...nel.org>
>Sent: Wednesday, February 19, 2025 9:32 PM
>To: Nas Chung <nas.chung@...psnmedia.com>
>Cc: mchehab@...nel.org; hverkuil@...all.nl; sebastian.fricke@...labora.com;
>robh@...nel.org; krzk+dt@...nel.org; conor+dt@...nel.org; linux-
>media@...r.kernel.org; devicetree@...r.kernel.org; linux-
>kernel@...r.kernel.org; linux-imx@....com; linux-arm-
>kernel@...ts.infradead.org; jackson.lee <jackson.lee@...psnmedia.com>;
>lafley.kim <lafley.kim@...psnmedia.com>
>Subject: Re: [PATCH 3/8] dt-bindings: media: nxp: Add Wave6 video codec
>device
>
>On 18/02/2025 10:21, Nas Chung wrote:
>> For example:
>> vpu: video-codec@...80000 {
>>         compatible = "nxp,imx95-vpu";
>>         reg = <0x0 0x4c480000 0x0 0x50000>;
>> 	ranges = <0x0 0x0 0x4c480000 0x50000>;
>>
>>         vpuctrl: vpu-ctrl@...00 {
>>           compatible = "nxp,imx95-vpu-ctrl";
>> 	  reg = <0x40000 0x10000>;
>>         };
>>
>>         vpucore0: vpu-core@...00 {
>>           compatible = "nxp,imx95-vpu-core";
>>           reg = <0x00000 0x10000>;
>>         };
>>
>>         vpucore1: vpu-core@...00 {
>>           compatible = "nxp,imx95-vpu-core";
>>           reg = <0x10000 0x10000>;
>>         };
>>
>>         vpucore2: vpu-core@...00 {
>>           compatible = "nxp,imx95-vpu-core";
>>           reg = <0x20000 0x10000>;
>>         };
>>
>>         vpucore3: vpu-core@...00 {
>>           compatible = "nxp,imx95-vpu-core";
>
>Why do you need compatible here? Could it be anything else?

I will update the driver based on the final DT.

>
>>           reg = <0x30000 0x10000>;
>
>Where is the rest of resources? You created children only for one
>resource - address space?

Sorry for the confusion.
I believe the final example looks like the one below.

vpu: video-codec@...80000 {
        compatible = "nxp,imx95-vpu";
        reg = <0x0 0x4c480000 0x0 0x50000>;
        ranges = <0x0 0x0 0x4c480000 0x50000>;

        vpuctrl: vpu-ctrl@...00 {
          compatible = "nxp,imx95-vpu-ctrl";
          reg = <0x40000 0x10000>;
          clocks = <&scmi_clk 115>,
                  <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>;
          clock-names = "vpu", "vpublk_wave";
          power-domains = <&scmi_devpd 21>, <&scmi_perf 10>;
          power-domain-names = "vpumix", "vpuperf";
          memory-region = <&vpu_boot>;
          #cooling-cells = <2>;
          sram = <&sram1>;
        };

        vpucore0: vpu-core@...00 {
          compatible = "nxp,imx95-vpu-core";
          reg = <0x00000 0x10000>;
          interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
          clocks = <&scmi_clk 115>,
                  <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>;
          clock-names = "vpu", "vpublk_wave";
          power-domains = <&scmi_devpd 21>;
        };

        vpucore1: vpu-core@...00 {
          compatible = "nxp,imx95-vpu-core";
          reg = <0x10000 0x10000>;
          interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
          clocks = <&scmi_clk 115>,
                  <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>;
          clock-names = "vpu", "vpublk_wave";
          power-domains = <&scmi_devpd 21>;
        };

        vpucore2: vpu-core@...00 {
          compatible = "nxp,imx95-vpu-core";
          reg = <0x20000 0x10000>;
          interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
          clocks = <&scmi_clk 115>,
                  <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>;
          clock-names = "vpu", "vpublk_wave";
          power-domains = <&scmi_devpd 21>;
        };

        vpucore3: vpu-core@...00 {
          compatible = "nxp,imx95-vpu-core";
          reg = <0x30000 0x10000>;
          interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
          clocks = <&scmi_clk 115>,
                  <&vpu_blk_ctrl IMX95_CLK_VPUBLK_WAVE>;
          clock-names = "vpu", "vpublk_wave";
          power-domains = <&scmi_devpd 21>;
        };
      };

Thanks.
Nas.

>
>Best regards,
>Krzysztof