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Message-ID: <20250220093352.GA11745@mazurka.cambridge.arm.com>
Date: Thu, 20 Feb 2025 09:33:52 +0000
From: Mikołaj Lenczewski <miko.lenczewski@....com>
To: Robin Murphy <robin.murphy@....com>
Cc: Ryan Roberts <ryan.roberts@....com>, yang@...amperecomputing.com,
	catalin.marinas@....com, will@...nel.org, joey.gouly@....com,
	broonie@...nel.org, mark.rutland@....com, james.morse@....com,
	yangyicong@...ilicon.com, anshuman.khandual@....com, maz@...nel.org,
	liaochang1@...wei.com, akpm@...ux-foundation.org, david@...hat.com,
	baohua@...nel.org, ioworker0@...il.com, oliver.upton@...ux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 1/3] arm64: Add BBM Level 2 cpu feature

On Wed, Feb 19, 2025 at 04:25:56PM +0000, Robin Murphy wrote:
> > On 19/02/2025 15:39, Robin Murphy wrote:
> >> ...
> >>
> >> If this may be used for splitting/compacting userspace mappings, then similarly
> >> to 6e192214c6c8 ("iommu/arm-smmu-v3: Document SVA interaction with new pagetable
> >> features"), strictly we'll also want a check in arm_smmu_sva_supported() to make
> >> sure that the SMMU is OK with BBML2 behaviour too, and disallow SVA if not. Note
> >> that the corresponding SMMUv3.2-BBML2 feature is already strict about TLB
> >> conflict aborts, so is comparatively nice and straightforward.
> 
> Yup, it's really more just a theoretical correctness concern - certainly 
> Arm's implementations from MMU-700 onwards do support BBML2, while 
> MMU-600 is now sufficiently old that nobody is likely to pair it with 
> new BBML-capable CPUs anyway - so it's just to cover the gap that in 
> principle there may be 3rd-party implementations which might get confused.
> 
> Cheers,
> Robin.

Hi Robin,

Thank you for taking the time to review these patches. I will add the
check in the next patch series.

-- 
Kind regards,
Mikołaj Lenczewski

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