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Message-ID: <20250221145718.115076-18-ajones@ventanamicro.com>
Date: Fri, 21 Feb 2025 15:57:27 +0100
From: Andrew Jones <ajones@...tanamicro.com>
To: linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-doc@...r.kernel.org
Cc: paul.walmsley@...ive.com,
palmer@...belt.com,
charlie@...osinc.com,
cleger@...osinc.com,
alex@...ti.fr,
Anup Patel <apatel@...tanamicro.com>,
corbet@....net
Subject: [PATCH v2 8/8] Documentation/kernel-parameters: Add riscv unaligned speed parameters
Document riscv parameters used to select scalar and vector unaligned
access speeds.
Signed-off-by: Andrew Jones <ajones@...tanamicro.com>
---
Documentation/admin-guide/kernel-parameters.txt | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index fb8752b42ec8..9e3c5fecfa52 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -7477,6 +7477,22 @@
Note that genuine overcurrent events won't be
reported either.
+ unaligned_scalar_speed=
+ [RISCV]
+ Format: {slow | fast | unsupported}
+ Allow skipping scalar unaligned access speed tests. This
+ is useful for testing alternative code paths and to skip
+ the tests in environments where they run too slowly. All
+ CPUs must have the same scalar unaligned access speed.
+
+ unaligned_vector_speed=
+ [RISCV]
+ Format: {slow | fast | unsupported}
+ Allow skipping vector unaligned access speed tests. This
+ is useful for testing alternative code paths and to skip
+ the tests in environments where they run too slowly. All
+ CPUs must have the same vector unaligned access speed.
+
unknown_nmi_panic
[X86] Cause panic on unknown NMI.
--
2.48.1
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