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Message-Id: <20250221161751.1278049-6-kuba@szczodrzynski.pl>
Date: Fri, 21 Feb 2025 17:17:51 +0100
From: Kuba SzczodrzyĆski <kuba@...zodrzynski.pl>
To: Maxime Ripard <mripard@...nel.org>,
Samuel Holland <samuel@...lland.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Thomas Zimmermann <tzimmermann@...e.de>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>,
linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org,
linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org,
dri-devel@...ts.freedesktop.org
Subject: [PATCH 5/5] riscv: dts: allwinner: d1s-t113: Add LVDS0 pins
Add LVDS pins to the PIO since it's now supported on D1s/T113.
Signed-off-by: Kuba SzczodrzyĆski <kuba@...zodrzynski.pl>
---
arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
index d241ba306..174b6d8f9 100644
--- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi
@@ -78,6 +78,15 @@ dsi_4lane_pins: dsi-4lane-pins {
function = "dsi";
};
+ /omit-if-no-ref/
+ lvds0_pins: lvds0-pins {
+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
+ "PD6", "PD7", "PD8", "PD9";
+ function = "lvds0";
+ drive-strength = <30>;
+ bias-disable;
+ };
+
/omit-if-no-ref/
lcd_rgb666_pins: lcd-rgb666-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5",
--
2.25.1
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