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Message-ID: <20250221213837.1594057-2-naresh.solanki@9elements.com>
Date: Sat, 22 Feb 2025 03:08:35 +0530
From: Naresh Solanki <naresh.solanki@...ements.com>
To: Guenter Roeck <linux@...ck-us.net>,
broonie@...nel.org,
conor@...nel.org,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>,
Andrew Jeffery <andrew@...econstruct.com.au>,
Naresh Solanki <Naresh.Solanki@...ements.com>,
Patrick Rudolph <patrick.rudolph@...ements.com>
Cc: linux-hwmon@...r.kernel.org,
Naresh Solanki <naresh.solanki@...ements.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-aspeed@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 2/2] ARM: dts: aspeed: sbp1: Align regulator node with Infineon ir38060
The PMBus driver expects a regulator node, which was missing in the
board's device tree. This was corrected in the latest device binding
update for ir38060.yaml.
Update the board's DT binding accordingly to align with the fixed
device binding and ensure proper regulator support.
Fixes: 1d333cd641fb ("ARM: dts: aspeed: sbp1: IBM sbp1 BMC board")
Signed-off-by: Naresh Solanki <naresh.solanki@...ements.com>
---
Changes in V2:
1. Update commit message
2. Add fix tag
---
.../boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts | 124 +++++++++++-------
1 file changed, 80 insertions(+), 44 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts
index 8d98be3d5f2e..34f3d773a775 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-sbp1.dts
@@ -1838,13 +1838,17 @@ i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
- pvcore_nic2: ir38263-pvcore-nic2@40 {
+ ir38263_pvcore_nic2: ir38263-pvcore-nic2@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "pvcore_nic2";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ pvcore_nic2: vout {
+ regulator-name = "pvcore_nic2";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
@@ -1853,13 +1857,17 @@ i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
- pvcore_nic1: ir38263-pvcore-nic1@40 {
+ ir38263_pvcore_nic1: ir38263-pvcore-nic1@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "pvcore_nic1";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ pvcore_nic1: vout {
+ regulator-name = "pvcore_nic1";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
@@ -1874,13 +1882,17 @@ i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
- p3v3_nic: ir38263-p3v3-nic@40 {
+ ir38263_p3v3_nic: ir38263-p3v3-nic@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "p3v3_nic";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ p3v3_nic: vout {
+ regulator-name = "p3v3_nic";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
@@ -1889,13 +1901,17 @@ i2c@6 {
#address-cells = <1>;
#size-cells = <0>;
- p1v2_nic: ir38263-p1v2-nic@40 {
+ ir38263_p1v2_nic: ir38263-p1v2-nic@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "p1v2_nic";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ p1v2_nic: vout {
+ regulator-name = "p1v2_nic";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
@@ -1904,13 +1920,17 @@ i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
- p1v8_nic: ir38263-p1v8-nic@40 {
+ ir38263_p1v8_nic: ir38263-p1v8-nic@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "p1v8_nic";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ p1v8_nic: vout {
+ regulator-name = "p1v8_nic";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
};
@@ -2070,13 +2090,17 @@ i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
- p1v05_pch_aux: ir38263-p1v05-pch-aux@40 {
+ ir38263_p1v05_pch_aux: ir38263-p1v05-pch-aux@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "p1v05_pch_aux";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ p1v05_pch_aux: vout {
+ regulator-name = "p1v05_pch_aux";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
@@ -2085,13 +2109,17 @@ i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
- p1v8_pch_aux: ir38060-p1v8-pch-aux@40 {
+ ir38060_p1v8_pch_aux: ir38060-p1v8-pch-aux@40 {
compatible = "infineon,ir38060";
reg = <0x40>;
- regulator-name = "p1v8_pch_aux";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
+ regulators {
+ p1v8_pch_aux: vout {
+ regulator-name = "p1v8_pch_aux";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ };
+ };
};
};
@@ -3596,34 +3624,42 @@ i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
- p5v_aux: ir38263-p5v-aux@40 {
+ ir38263_p5v_aux: ir38263-p5v-aux@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- regulator-name = "p5v_aux";
- regulator-enable-ramp-delay = <2000>;
- vin-supply = <&p12v>;
- vbus-supply = <&p3v3_bmc_aux>;
- regulator-always-on;
- regulator-boot-on;
+ regulators {
+ p5v_aux: vout {
+ regulator-name = "p5v_aux";
+ regulator-enable-ramp-delay = <2000>;
+ vin-supply = <&p12v>;
+ vbus-supply = <&p3v3_bmc_aux>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+ };
};
};
i2c@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
- p3v3_aux: ir38263-p3v3-aux@40 {
+ ir38263_p3v3_aux: ir38263-p3v3-aux@40 {
compatible = "infineon,ir38263";
reg = <0x40>;
- vin-supply = <&p12v>;
- regulator-name = "p3v3_aux";
- /*
- * 2msec for regulator + 18msec for board capacitance
- * Note: Every IC has a PTC which slowly charges the bypass
- * cap.
- */
- regulator-enable-ramp-delay = <200000>;
+ regulators {
+ p3v3_aux: vout {
+ regulator-name = "p3v3_aux";
+ /*
+ * 2msec for regulator + 18msec for board capacitance
+ * Note: Every IC has a PTC which slowly charges the bypass
+ * cap.
+ */
+ vin-supply = <&p12v>;
+ regulator-enable-ramp-delay = <200000>;
+ };
+ };
};
};
i2c@3 {
--
2.42.0
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