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Message-ID: <plurppltr3ttmmptnrounyjw3l7justgsl3dlpjqtkzsvkctsc@3cz52qtnyd3q>
Date: Fri, 21 Feb 2025 02:41:52 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Lorenzo Pieralisi <lpieralisi@...nel.org>, 
	Krzysztof Wilczyński <kw@...ux.com>, Rob Herring <robh@...nel.org>, 
	Bjorn Helgaas <bhelgaas@...gle.com>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Mrinmay Sarkar <quic_msarkar@...cinc.com>, 
	Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>, 
	Krzysztof Wilczyński <kwilczynski@...nel.org>, Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, 
	linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/6] dt-bindings: PCI: qcom-ep: describe optional IOMMU

On Thu, Feb 20, 2025 at 12:49:43PM +0530, Manivannan Sadhasivam wrote:
> On Mon, Feb 17, 2025 at 08:56:13PM +0200, Dmitry Baryshkov wrote:
> > Platforms which use eDMA for PCIe EP transfers (like SA8775P) also use
> > IOMMU in order to setup transfer windows.
> 
> eDMA has nothing to do with IOMMU. In fact, it is not clear on what IOMMU does
> on the endpoint side since we do not assign SID based on the RID from RC.

Well... If my memory serves me right, I had to enable IOMMU after
switching from iATU to eDMA. But I might be mistaken here. I will update
this commit message not to mention eDMA.

> 
> But the binding should describe it anyway since IOMMU does sit between DDR and
> PCIe IP.
> 
> - Mani
> 
> > Fix the schema in order to
> > allow specifying the IOMMU.
> > 
> > Fixes: 9d3d5e75f31c ("dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC")
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> > ---
> >  Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 17 +++++++++++++++++
> >  1 file changed, 17 insertions(+)
> > 
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> > index 1226ee5d08d1ae909b07b0d78014618c4c74e9a8..800accdf5947e7178ad80f0759cf53111be1a814 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
> > @@ -75,6 +75,9 @@ properties:
> >        - const: doorbell
> >        - const: dma
> >  
> > +  iommus:
> > +    maxItems: 1
> > +
> >    reset-gpios:
> >      description: GPIO used as PERST# input signal
> >      maxItems: 1
> > @@ -233,6 +236,20 @@ allOf:
> >            minItems: 3
> >            maxItems: 3
> >  
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: qcom,sdx55-pcie-ep
> > +    then:
> > +      properties:
> > +        iommus:
> > +          false
> > +
> > +    else:
> > +      required:
> > +        - iommus
> > +
> >  unevaluatedProperties: false
> >  
> >  examples:
> > 
> > -- 
> > 2.39.5
> > 
> 
> -- 
> மணிவண்ணன் சதாசிவம்

-- 
With best wishes
Dmitry

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