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Message-ID: <20250221012101.GF2510987@rocinante>
Date: Fri, 21 Feb 2025 10:21:01 +0900
From: Krzysztof WilczyĆski <kw@...ux.com>
To: Zhiyuan Dai <daizhiyuan@...tium.com.cn>
Cc: helgaas@...nel.org, bhelgaas@...gle.com, christian.koenig@....com,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org
Subject: Re: [PATCH v3] PCI: Update Resizable BAR Capability Register fields
Hello,
> PCI Express Base Spec r6.0 defines BAR size up to 8 EB (2^63 bytes),
> but supporting anything bigger than 128TB requires changes to pci_rebar_get_possible_sizes()
> to read the additional Capability bits from the Control register.
>
> If 8EB support is required, callers will need to be updated to handle u64 instead of u32.
> For now, support is limited to 128TB, and support for sizes greater than 128TB can be
> deferred to a later time.
I think this would be a v4?
If the reviews still stand, then we can correct the subject line while
applying the patch. No need to send another e-mail.
Krzysztof
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