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Message-ID: <e58a20f8-e8bf-409c-a878-af2bd3c7d243@nvidia.com>
Date: Fri, 21 Feb 2025 18:44:14 +0530
From: Sumit Gupta <sumitg@...dia.com>
To: "Rafael J. Wysocki" <rafael@...nel.org>, "zhenglifeng (A)"
<zhenglifeng1@...wei.com>
CC: Viresh Kumar <viresh.kumar@...aro.org>, <lenb@...nel.org>,
<robert.moore@...el.com>, <corbet@....net>, <linux-pm@...r.kernel.org>,
<linux-acpi@...r.kernel.org>, <linux-doc@...r.kernel.org>,
<acpica-devel@...ts.linux.dev>, <linux-kernel@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <treding@...dia.com>, <jonathanh@...dia.com>,
<sashal@...dia.com>, <vsethi@...dia.com>, <ksitaraman@...dia.com>,
<sanjayc@...dia.com>, <bbasu@...dia.com>, Sumit Gupta <sumitg@...dia.com>
Subject: Re: [Patch 0/5] Support Autonomous Selection mode in cppc_cpufreq
On 19/02/25 00:53, Rafael J. Wysocki wrote:
>
> There seems to be some quite fundamental disagreement on how this
> should be done, so I'm afraid I cannot do much about it ATM.
>
> Please agree on a common approach and come back to me when you are ready.
>
> Sending two concurrent patchsets under confusingly similar names again
> and again isn't particularly helpful.
>
> Thanks!
Hi Rafael,
Thank you for looking into this.
Hi Lifeng,
As per the discussion, we can make the driver future extensible and
also can optimize the register read/write access.
I gave some thought and below is my proposal.
1) Pick 'Patch 1-7' from your patch series [1] which optimize API's
to read/write a cpc register.
2) Pick my patches in [2]:
- Patch 1-4: Keep all cpc registers together under acpi_cppc sysfs.
Also, update existing API's to read/write regs in batch.
- Patch 5: Creates 'cppc_cpufreq_epp_driver' instance for booting
all CPU's in Auto mode and set registers with right values.
They can be updated after boot from sysfs to change hints to HW.
I can use the optimized API's from [1] where required in [2].
Let me know if you are okay with this proposal.
I can also send an updated patch series with all the patches combined?
[1]
https://lore.kernel.org/all/20250206131428.3261578-1-zhenglifeng1@huawei.com/
[2] https://lore.kernel.org/lkml/20250211103737.447704-1-sumitg@nvidia.com/
Regards,
Sumit Gupta
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