[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID:
<TYCPR01MB84379C13A329703421086FF298C62@TYCPR01MB8437.jpnprd01.prod.outlook.com>
Date: Sat, 22 Feb 2025 20:54:17 +0800
From: Shengyu Qu <wiagn233@...look.com>
To: maud_spierings@...mail.com, Conor Dooley <conor@...nel.org>,
Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>
Cc: wiagn233@...look.com, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: dts: starfive: fml13v01: increase eMMC bus speed
Hi,
The clock speed limit here seems because of some clock HW issues:
https://github.com/torvalds/linux/commit/af571133f7ae028ec9b5fdab78f483af13bf28d3
Maybe we need some assist from Starfive guys?
Best regards,
Shengyu
在 2025/2/15 17:46, Maud Spierings via B4 Relay 写道:
> From: Maud Spierings <maud_spierings@...mail.com>
>
> The assigned clock speed of 50 MHz is and max-frequency of 100MHz are
> limitting this interface which is SDIO 5.0 capable. Sadly at 200MHz it
> fails to mount an eMMC drive, 150MHz (really 132 MHz) is the highest it
> was able to get.
>
> This improves the seq read/write performance by 2x~
>
> Signed-off-by: Maud Spierings <maud_spierings@...mail.com>
> ---
> I put this in this specific dts instead of the common one as I cannot
> test if other boards are also able to handle these speeds.
>
> This patch depends on [1]
>
> [1]: https://lore.kernel.org/all/20250207093618.126636-1-sandie.cao@deepcomputing.io/
> ---
> arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts | 5 +++++
> 1 file changed, 5 insertions(+)
>
>
> ---
> base-commit: 0bc08ec1ff5a32449d2b04704173dbf3ebd6b014
> change-id: 20250215-fml13v01_emmc_speed-67812bd9b404
>
> Best regards,
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
> index 8d9ce8b69a71be78ca57618ae842c9f415648450..1f4bac9f89463a6af844b8f1743bdfa659e612ab 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
> +++ b/arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts
> @@ -11,6 +11,11 @@ / {
> compatible = "deepcomputing,fml13v01", "starfive,jh7110";
> };
>
> +&mmc0 {
> + max-frequency = <200000000>;
> + assigned-clock-rates = <150000000>;
> +};
> +
> &pcie1 {
> perst-gpios = <&sysgpio 21 GPIO_ACTIVE_LOW>;
> phys = <&pciephy1>;
Download attachment "OpenPGP_0xE3520CC91929C8E7.asc" of type "application/pgp-keys" (6869 bytes)
Download attachment "OpenPGP_signature.asc" of type "application/pgp-signature" (841 bytes)
Powered by blists - more mailing lists