[<prev] [next>] [day] [month] [year] [list]
Message-ID: <20250223100757.73531-1-andyshrk@163.com>
Date: Sun, 23 Feb 2025 18:07:46 +0800
From: Andy Yan <andyshrk@....com>
To: heiko@...ech.de
Cc: krzk+dt@...nel.org,
robh@...nel.org,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
Andy Yan <andyshrk@....com>
Subject: [PATCH] arm64: dts: rockchip: Enable USB3 OTG on rk3588s Cool Pi 4B
Enable USB3 OTG and it's related PHY node. And the PHY will
also be shared with the upcoming DisplayPort controller.
Signed-off-by: Andy Yan <andyshrk@....com>
---
.../boot/dts/rockchip/rk3588s-coolpi-4b.dts | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts
index 9c394f733bbf..7faf189c4776 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-coolpi-4b.dts
@@ -803,6 +803,14 @@ &tsadc {
status = "okay";
};
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
&u2phy2 {
status = "okay";
};
@@ -832,6 +840,16 @@ &uart9 {
pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
};
+&usbdp_phy0 {
+ /*
+ * USBDP PHY0 is wired to a USB3 Type-A OTG connector. Additionally
+ * the differential pairs 0+1 and the aux channel are wired to a
+ * mini DP connector.
+ */
+ rockchip,dp-lane-mux = <0 1>;
+ status = "okay";
+};
+
&usb_host0_ehci {
status = "okay";
};
@@ -840,6 +858,11 @@ &usb_host0_ohci {
status = "okay";
};
+&usb_host0_xhci {
+ extcon = <&u2phy0>;
+ status = "okay";
+};
+
&usb_host1_ehci {
status = "okay";
};
--
2.43.0
Powered by blists - more mailing lists